library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
use std.textio.all;
use work.all;



entity imixcol is 
port ( InpxDI : in std_logic_vector (127 downto 0);
       OupxDO : out std_logic_vector (127 downto 0)
       );
       
end entity imixcol;

architecture ballif of imixcol is
begin 

	cmat0: entity invmixcol (ballif) port map (InpxDI(31 downto 0),OupxDO(31 downto 0));
	cmat1: entity invmixcol (ballif) port map (InpxDI(63 downto 32),OupxDO(63 downto 32));
	cmat2: entity invmixcol (ballif) port map (InpxDI(95 downto 64),OupxDO(95 downto 64));
	cmat3: entity invmixcol (ballif) port map (InpxDI(127 downto 96),OupxDO(127 downto 96));

 
end architecture ballif;