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Tue, Jul 16, 19:06

Makefile
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SRC_PATH = src
BUILD_DIR = build
VHDL_SRCS = \
$(SRC_PATH)/Dff_Mux.vhdl \
$(SRC_PATH)/Dff_R.vhdl \
$(SRC_PATH)/STAGE.vhdl \
$(SRC_PATH)/STAGEn.vhdl \
$(SRC_PATH)/GF4_MUL.vhdl \
$(SRC_PATH)/GF4_MUL_SCLw2.vhdl \
$(SRC_PATH)/GF4_SQ.vhdl \
$(SRC_PATH)/GF4_ScW2.vhdl \
$(SRC_PATH)/GF4_ScW.vhdl \
$(SRC_PATH)/GF16_INV.vhdl \
$(SRC_PATH)/GF16_SQ_SCnu.vhdl \
$(SRC_PATH)/GF16_MUL.vhdl \
$(SRC_PATH)/GF256_INV.vhdl \
$(SRC_PATH)/SBOX.vhdl \
$(SRC_PATH)/Mux21.vhdl \
$(SRC_PATH)/Mux8_21.vhdl \
$(SRC_PATH)/Mux32_21.vhdl \
$(SRC_PATH)/xtime.vhd \
$(SRC_PATH)/xxtime.vhd \
$(SRC_PATH)/MC5.vhd \
$(SRC_PATH)/eff1.vhd \
$(SRC_PATH)/ereg.vhd \
$(SRC_PATH)/cgate1.vhd \
$(SRC_PATH)/forkaesv10.vhdl \
$(SRC_PATH)/forkv0_tb.vhdl
TB_MODULE = aes_tb
WORKLIB = $(BUILD_DIR)/work-obj93.cf
WAVEFILE = wavefile.vcd
all: verify
$(BUILD_DIR): test_generator
mkdir -p $(BUILD_DIR)
cp test_vectors/Testinput.txt test_vectors/Testoutput.txt $(BUILD_DIR)/
$(WORKLIB): $(VHDL_SRCS) $(BUILD_DIR)
ghdl -a --ieee=synopsys -fexplicit --workdir=$(BUILD_DIR) $(VHDL_SRCS)
elaborate: $(WORKLIB) $(BUILD_DIR)
ghdl -e --ieee=synopsys -fexplicit --workdir=$(BUILD_DIR) $(TB_MODULE)
$(WAVEFILE): elaborate $(BUILD_DIR)
cd $(BUILD_DIR) && ghdl -r --ieee=synopsys -fexplicit $(TB_MODULE) --vcd=$(WAVEFILE) && cd ..
analyse: $(WORKLIB)
verify: $(WAVEFILE)
cd $(BUILD_DIR) && ../scripts/verify.sh && cd ..
test_generator:
cd test_vectors && $(CC) case_generator.c -o case_generator.exe && ./case_generator.exe && cd ..
clean:
rm -f $(WAVEFILE) $(WORKLIB) test_vectors/case_generator.exe test_vectors/Testinput.txt test_vectors/Testoutput.txt
rm -f test_vectors/case_generator.exe test_vectors/Testinput.txt test_vectors/Testoutput.txt
rm -rf $(BUILD_DIR)

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