synopsis_project

1. Copy HDL folder into ./

2. Edit script_lp.tcl : give the name of files to be compiled etc.

3. Copy .synopsys_dc.setup to ./ and run on shell: cat .synopsys_dc.setup

4. on shell: design_vision& , then choose File->Execute Script and choose script_lp.tcl

5. Edit line 4 of saif.cmd such that the testbench finishes at the end of the input testbench file. For instance, this is 17*100ns*1000 = 170000 for encryption testbench.

5. "source post.sh" and verify that things work as expected (generally we use "diff Testoutput.txt Testoutput2.txt", where the latter is produced by the circuit and the former was precomputed by the testbench generator file.)

5. Run power_lp.tcl through Design Vision's execute script which will output power results.

Example to obtain encryption analysis of SC1_KC1_TC circuit

1. cp in_enc.txt Testinput.txt && cp out_enc.txt Testoutput.txt (those files in test_cases folder)
2. cat .synopsys_dc.setup
3. design_vision --> Execute script_lp.tcl script (do not close design_vision windows here)
4. Update line 4 of saif.cmd as "run 170000"
5. "source post.sh"
6. (from already open design_vision window) execute power_lp.tcl
7. See the above script to find which files the power results are written into.