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oncilla-motordriver-fw/src/dma_packet_queue.h
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dma_packet_queue.h
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/*
* dma_packet_queue.h
*
* Copyright (c) Alexandre Tuleu
* EPFL Biorobotics Laboratory (http://biorob.epfl.ch)
* EPFL Ecole Polytechnique Federale de Lausanne (http://www.epfl.ch)
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/**
* \file dma_packet_queue.h
* \author Alexandre Tuleu
*/
#ifndef DMA_PACKET_QUEUE_H_
#define DMA_PACKET_QUEUE_H_
/**
* length of the packet queue
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_LENGTH 8
//associat
#define DMA_PACKET_QUEUE_MASK (DMA_PACKET_QUEUE_LENGTH - 1)
#define DMA_SBCP_MAX_PACKET_SIZE 64
#define DMA_SBCP_MAX_PACKET_PAYLOAD_SIZE (DMA_SBCP_MAX_PACKET_SIZE - 6)
#define DMA_PACKET_QUEUE_BH_SIZE (2 * DMA_SBCP_MAX_PACKET_SIZE)
#define DMA_SBCP_MAX_PACKET_SIZE_MASK (DMA_SBCP_MAX_PACKET_SIZE - 1)
#include "dma_memory_mapping_sbcp.h"
/**
* Increments the tail of a DMA_packet_queue. Increasing its size
* \param q : the queue to increment
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_INCREMENT_TAIL(q) do {\
q.tail = (++q.tail) & DMA_PACKET_QUEUE_MASK;\
++q.nb_packet;\
}while(0)
/**
* Increments the head of a DMA_packet_queue, decreasing its size.
* \param q : the queue to increment
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_INCREMENT_HEAD(q) do {\
q.head = (++q.head) & DMA_PACKET_QUEUE_MASK;\
--q.nb_packet;\
}while(0)
/**
* Initializes an empty DMA_packet_queue
* \param q : the packet queue to init.
* \ingrou PQ
*/
#define DMA_PACKET_QUEUE_SET_EMPTY(q) do{\
q.head = 0;\
q.tail = DMA_PACKET_QUEUE_MASK;\
q.nb_packet = 0;\
}while(0)
/**
* Tests if a packet queue is full
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_FULL(q) (q.nb_packet >= DMA_PACKET_QUEUE_LENGTH)
/**
* Tests if a packet queue is empty
*
*/
#define DMA_PACKET_QUEUE_EMPTY(q) (q.nb_packet <= 0)
/**
* Tests if a packet is in a bad state
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_OVERRIDE(q) (q.nb_packet > DMA_PACKET_QUEUE_LENGTH)
/**
* \name DMA_packet_queue data access function
* \ingroup PQ
*/
//extern unsigned int dma_sbcp_bus_rx_buffer[512];
//#ifdef SBCP_IS_MASTER 0x4400,space(dma)));
//extern unsigned int dma_sbcp_usb_rx_buffer[512];
//#elif defined(SBCP_IS_SLAVE)
//extern unsigned int dma_sbcp_bus_tx_buffer[128];
//extern unsigned int dma_sbcp_bus_ll_tx_buffer[32];
//#endif
///@{
/**
* Returns the BUS Rx buffer associated with a DMA_packet_queue_buffer_handler,
* to use with DMA.
* \param bh : the DMA_packet_queue_buffer_handler
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_BUS_GET_DMA(bh) \
((unsigned int )(bh * DMA_PACKET_QUEUE_BH_SIZE + 1024))
//(__builtin_dmaoffset(&(dma_sbcp_bus_rx_buffer[ptr * 128])))
/**
* Returns the BUS Rx buffer associated with a DMA_packet_queue_buffer_handler,
* to use with CPU.
* \param bh : the DMA_packet_queue_buffer_handler
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_BUS_GET_CPU(bh) \
((unsigned int *)(((void *) (bh * DMA_PACKET_QUEUE_BH_SIZE)) + 1024 + (unsigned int)(&_DMA_BASE)))
//((unsigned int *) (&(dma_sbcp_bus_rx_buffer[ptr * 128])))
#ifdef SBCP_IS_MASTER
/**
* Returns the USB Rx buffer associated with a DMA_packet_queue_buffer_handler,
* to use with DMA. Only for master
* \param bh : the DMA_packet_queue_buffer_handler
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_USB_GET_DMA(bh) \
((unsigned int )(bh * DMA_PACKET_QUEUE_BH_SIZE ))
//(__builtin_dmaoffset(&(dma_sbcp_usb_rx_buffer[ptr * 128])))
/**
* Returns the USB Rx buffer associated with a DMA_packet_queue_buffer_handler,
* to use with CPU. Only for master
* \param bh : the DMA_packet_queue_buffer_handler
* \ingroup PQ
*/
#define DMA_PACKET_QUEUE_USB_GET_CPU(ptr) \
((unsigned int *)(((void *) (ptr * DMA_PACKET_QUEUE_BH_SIZE)) + (unsigned int)(&_DMA_BASE)))
//((unsigned int *) &(dma_sbcp_usb_rx_buffer[ptr * 128]))
#else
/**
* Returns the BUS tx buffer, CPU version. Only for slaves.
*/
#define DMA_PACKET_QUEUE_BUS_TX_BUFFER_DMA __builtin_dmaoffset(dma_sbcp_bus_tx_buffer)
/**
* Returns the BUS tx buffer, DMA version. Only for slaves.
*/
#define DMA_PACKET_QUEUE_BUS_TX_BUFFER_CPU \
(dma_sbcp_bus_tx_buffer)
#define DMA_PACKET_QUEUE_BUS_LL_TX_BUFFER_DMA \
__builtin_dmaoffset(dma_sbcp_bus_tx_ll_buffer)
#define DMA_PACKET_QUEUE_BUS_LL_TX_BUFFER_CPU \
(dma_sbcp_bus_tx_ll_buffer)
#define DMA_PACKET_QUEUE_BUS_LL_ERROR_TX_BUFFER_CPU \
(dma_sbcp_bus_tx_ll_error_buffer)
#define DMA_PACKET_QUEUE_BUS_LL_ERROR_TX_BUFFER_DMA \
__builtin_dmaoffset(dma_sbcp_bus_tx_ll_error_buffer)
#endif
///@}
/**
* Represents a locaton on memory where you can store sbcp packets. You could
* translate the handle to an array pointer using :
* DMA_PACKET_QUEUE_USB_GET_CPU() , DMA_PACKET_QUEUE_USB_GET_DMA() ,
* DMA_PACKET_QUEUE_BUS_GET_CPU() , DMA_PACKET_QUEUE_BUS_GET_DMA() .
* DMA_PACKET_QUEUE_BUS_TX_BUFFER_CPU and DMA_PACKET_QUEUE_BUS_TX_BUFFER_DMA.
* CPU version are pointer to and unsigned int array, and DMA version are only
* supposed to be used with the DMAxSTA and DMAxSTB registers.
*
* \ingroup PQ
*/
typedef unsigned int DMA_packet_queue_buffer_handler;
/**
* Represents a queue of packets. This is an hybrid approach between fixed buffer
* and Ring buffers. We stored data in buffer of fixed sizes, so we are sure that
* data is always continuous (mandatory for KISS DMA manipulation), and RingBuffer
* approach, where nothin is allocated.
* \ingroup PQ
*/
typedef struct DMA_packet_queue {
DMA_packet_queue_buffer_handler head;
DMA_packet_queue_buffer_handler tail;
signed int nb_packet;/*data ptrs in dma space */
} DMA_packet_queue;
#endif //DMA_PACKET_QUEUE_H_
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