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handling emrge conflicts

Authored by Christoph Schaefer <cerschae@greina13.cm.cluster> on Nov 16 2018, 12:13.

Description

handling emrge conflicts

Event Timeline

Christoph Schaefer <cerschae@greina13.cm.cluster> committed R1448:ebe667d850ef: handling emrge conflicts (authored by Christoph Schaefer <cerschae@greina13.cm.cluster>).Nov 16 2018, 12:13

Merged Changes

CommitAuthorDetailsCommitted
ebdc47dd348dfourestey
new env files for piz daint and grand tave at CSCS 
Nov 16 2018
47b3898bb0fbfourestey
added cmath headers for sin/cos/exp... 
Nov 15 2018
351d165bf119fourestey
new separated CPU and GPU chi computation 
Nov 15 2018
158d4f666930fourestey
new fonctions for chi communications and computation 
Nov 15 2018
9c5212a3f1c2fourestey
update 
Nov 15 2018
3b39de1e7577fourestey
changing the number of blocks to fit 2 GPUs (this wont be nececassry anymore… 
Nov 15 2018
c06f5dfe384efourestey
putting the timers at the right place 
Nov 15 2018
e6d16f877fc5fourestey
mpi checkers 
Nov 15 2018
03b37aeb4f8ffourestey
adding the GPU and CPU separate chi versions 
Nov 15 2018
4def3add5f8cfourestey
separating CPU and GPU version 
Nov 15 2018
9e146f2b09f2fourestey
adding back the lenstool test 
Nov 15 2018
d9782d8e6cddfourestey
moving files to src 
Nov 15 2018
4a31682c67d2fourestey
new routine to read input files WITHOUT allocating the arrays at the same time 
Nov 15 2018
0c50fe56011cfourestey
update 
Nov 15 2018
7adf9ec67f29fourestey
chi GPU stuff 
Nov 15 2018
d07fd40220cafourestey
chi CPU stuff 
Nov 15 2018
05e3ee187889fourestey
timer routines 
Nov 13 2018
aa527bee03cafourestey
allocation is separated between CPU and GPU 
Nov 13 2018
f7a48e1a4818fourestey
moved to src 
Nov 13 2018
b170e0b6503ffourestey
new default block sizes 
Nov 12 2018
7c0e86f3c175fourestey
adding register count (in comment at least) 
Nov 12 2018
984af49f269bfourestey
displaying PCI bus for no reasons besides showing off 
Nov 8 2018
3f76ef8fb02bfourestey
removing problematic image 
Nov 8 2018
70b0ef7a4dfcfourestey
better debug output for images properties 
Nov 8 2018
31dfd9cc7a90fourestey
better debug output for multi-PE 
Nov 8 2018
c37d43b65a0efourestey
working version 
Nov 8 2018
801497074f37fourestey
setting image_pos_gpu to zero by hand 
Nov 4 2018
30974a4044b2fourestey
removing the non-barycenter chi computation to speed things up 
Nov 2 2018
ea1f61931bb9fourestey
adding delensing on the GPUs 
Nov 2 2018
f62a53253520fourestey
working version of the delensing on the GPU 
Oct 31 2018
d063401aa720fourestey
working version of the delensing on the GPU 
Oct 31 2018
45dc32c6f56ffourestey
unified memory FTW 
Oct 19 2018
a90405bcb99bfourestey
unified memory FTW 
Oct 19 2018
14d56602b249fourestey
unified memory FTW 
Oct 19 2018
82b0a9037294fourestey
user defined cpu and gpu compilation flags 
Oct 19 2018
ae9e0e93daf0fourestey
unified memory FTW 
Oct 19 2018
618cf4731c02fourestey
Merge branch 'master' into develop 
Oct 19 2018
401aabdae2f7fourestey
overhaul of the whole chi computation concept but separating the delensing and… 
Oct 7 2018
0142e6091cd0fourestey
overhaul of the whole chi computation concept but separating the delensing and… 
Oct 7 2018
1589525195acfourestey
update 
Oct 4 2018