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Diffusion Lightweight ForkAES 3fca2cd977ef

archgit created for archive purposes
3fca2cd977ef
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Authored by Fatih <ballif@lasecpc22> on Oct 1 2019, 17:49.

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archgit created for archive purposes

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Committed
Fatih <ballif@lasecpc22>Oct 1 2019, 17:49
Pushed
ballifaOct 1 2019, 19:38
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Fatih <ballif@lasecpc22> committed R9435:3fca2cd977ef: archgit created for archive purposes (authored by Fatih <ballif@lasecpc22>).Oct 1 2019, 17:49

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A(dir)1_SC1_KC1_TC/
A(dir)1_SC1_KC1_TC/HDL/
A(dir)1_SC1_KC1_TC/HDL/RTL/
A1_SC1_KC1_TC/HDL/RTL/andmask.vhd
A1_SC1_KC1_TC/HDL/RTL/circ_mult.vhd
A1_SC1_KC1_TC/HDL/RTL/enc.vhd
A1_SC1_KC1_TC/HDL/RTL/forkaes.vhd
A1_SC1_KC1_TC/HDL/RTL/imixcol.vhd
A1_SC1_KC1_TC/HDL/RTL/invmixcol.vhd
A1_SC1_KC1_TC/HDL/RTL/ishiftrows.vhd
A1_SC1_KC1_TC/HDL/RTL/keygen.vhd
A1_SC1_KC1_TC/HDL/RTL/mixcol.vhd
A1_SC1_KC1_TC/HDL/RTL/mixcolumn.vhd
A1_SC1_KC1_TC/HDL/RTL/mux128.vhd
A1_SC1_KC1_TC/HDL/RTL/reg.vhd
A1_SC1_KC1_TC/HDL/RTL/sbox.vhd
A1_SC1_KC1_TC/HDL/RTL/sboxed.vhd
A1_SC1_KC1_TC/HDL/RTL/shiftrows.vhd
A1_SC1_KC1_TC/HDL/RTL/texpand.vhd
A1_SC1_KC1_TC/HDL/RTL/xtime.vhd
A1_SC1_KC1_TC/HDL/RTL/xxtime.vhd
A(dir)1_SC1_KC1_TC/HDL/TBENCH/
A1_SC1_KC1_TC/HDL/TBENCH/forkaes_tb.vhd
A1_SC1_KC1_TC/sc1_kc1_tc.pdf
A1_SC1_KC1_TC/sc1_kc1_tc.svg
A(dir)1_SC1_KC1_TC/test_cases/
A1_SC1_KC1_TC/test_cases/case_generator.c
A1_SC1_KC1_TC/test_cases/in_avg.txt
A1_SC1_KC1_TC/test_cases/in_dec.txt
A1_SC1_KC1_TC/test_cases/in_enc.txt
A1_SC1_KC1_TC/test_cases/in_rec.txt
A1_SC1_KC1_TC/test_cases/out_avg.txt
A1_SC1_KC1_TC/test_cases/out_dec.txt
A1_SC1_KC1_TC/test_cases/out_enc.txt
A1_SC1_KC1_TC/test_cases/out_rec.txt
A(dir)2_SC1_KC1_TC_cg/
A(dir)2_SC1_KC1_TC_cg/HDL/
A(dir)2_SC1_KC1_TC_cg/HDL/RTL/
A2_SC1_KC1_TC_cg/HDL/RTL/andmask.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/circ_mult.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/clockgater.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/controller.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/enc.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/forkaes.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/imixcol.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/invmixcol.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/ishiftrows.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/keygen.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/mixcol.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/mixcolumn.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/mux128.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/reg.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/sbox.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/sboxed.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/shiftrows.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/texpand.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/xtime.vhd
A2_SC1_KC1_TC_cg/HDL/RTL/xxtime.vhd
A(dir)2_SC1_KC1_TC_cg/HDL/TBENCH/
A2_SC1_KC1_TC_cg/HDL/TBENCH/forkaes_tb.vhd
A2_SC1_KC1_TC_cg/sc1_kc1_tc_cg.pdf
A2_SC1_KC1_TC_cg/sc1_kc1_tc_cg.svg
A(dir)2_SC1_KC1_TC_cg/test_cases/
A2_SC1_KC1_TC_cg/test_cases/case_generator.c
A2_SC1_KC1_TC_cg/test_cases/in_avg.txt
A2_SC1_KC1_TC_cg/test_cases/in_dec.txt
A2_SC1_KC1_TC_cg/test_cases/in_enc.txt
A2_SC1_KC1_TC_cg/test_cases/in_rec.txt
A2_SC1_KC1_TC_cg/test_cases/out_avg.txt
A2_SC1_KC1_TC_cg/test_cases/out_dec.txt
A2_SC1_KC1_TC_cg/test_cases/out_enc.txt
A2_SC1_KC1_TC_cg/test_cases/out_rec.txt
A(dir)3_SC2_KC1_TC/
A(dir)3_SC2_KC1_TC/HDL/
A(dir)3_SC2_KC1_TC/HDL/RTL/
A3_SC2_KC1_TC/HDL/RTL/andmask.vhd
A3_SC2_KC1_TC/HDL/RTL/circ_mult.vhd
A3_SC2_KC1_TC/HDL/RTL/clockgater.vhd
A3_SC2_KC1_TC/HDL/RTL/controller.vhd
A3_SC2_KC1_TC/HDL/RTL/decoder.vhd
A3_SC2_KC1_TC/HDL/RTL/enc.vhd
A3_SC2_KC1_TC/HDL/RTL/forkaes.vhd
A3_SC2_KC1_TC/HDL/RTL/imixcol.vhd
A3_SC2_KC1_TC/HDL/RTL/invmixcol.vhd
A3_SC2_KC1_TC/HDL/RTL/isbox.vhd
A3_SC2_KC1_TC/HDL/RTL/ishiftrows.vhd
A3_SC2_KC1_TC/HDL/RTL/keygen.vhd
A3_SC2_KC1_TC/HDL/RTL/mixcol.vhd
A3_SC2_KC1_TC/HDL/RTL/mixcolumn.vhd
A3_SC2_KC1_TC/HDL/RTL/mux128.vhd
A3_SC2_KC1_TC/HDL/RTL/reg.vhd
A3_SC2_KC1_TC/HDL/RTL/sbox.vhd
A3_SC2_KC1_TC/HDL/RTL/shiftrows.vhd
A3_SC2_KC1_TC/HDL/RTL/texpand.vhd
A3_SC2_KC1_TC/HDL/RTL/xtime.vhd
A3_SC2_KC1_TC/HDL/RTL/xxtime.vhd
A(dir)3_SC2_KC1_TC/HDL/TBENCH/
A3_SC2_KC1_TC/HDL/TBENCH/forkaes_tb.vhd
A3_SC2_KC1_TC/sc2_kc1_tc.pdf
A3_SC2_KC1_TC/sc2_kc1_tc.svg
A(dir)3_SC2_KC1_TC/test_cases/
A3_SC2_KC1_TC/test_cases/case_generator.c
A3_SC2_KC1_TC/test_cases/in_avg.txt
A3_SC2_KC1_TC/test_cases/in_dec.txt
A3_SC2_KC1_TC/test_cases/in_enc.txt
A3_SC2_KC1_TC/test_cases/in_rec.txt
A3_SC2_KC1_TC/test_cases/out_avg.txt
A3_SC2_KC1_TC/test_cases/out_dec.txt
A3_SC2_KC1_TC/test_cases/out_enc.txt
A3_SC2_KC1_TC/test_cases/out_rec.txt
A(dir)4_SC1_KC1/
A(dir)4_SC1_KC1/HDL/
A(dir)4_SC1_KC1/HDL/RTL/
A4_SC1_KC1/HDL/RTL/andmask.vhd
A4_SC1_KC1/HDL/RTL/circ_mult.vhd
A4_SC1_KC1/HDL/RTL/clockgater.vhd
A4_SC1_KC1/HDL/RTL/controller.vhd
A4_SC1_KC1/HDL/RTL/enc.vhd
A4_SC1_KC1/HDL/RTL/forkaes.vhd
A4_SC1_KC1/HDL/RTL/imixcol.vhd
A4_SC1_KC1/HDL/RTL/invmixcol.vhd
A4_SC1_KC1/HDL/RTL/ishiftrows.vhd
A4_SC1_KC1/HDL/RTL/keygen.vhd
A4_SC1_KC1/HDL/RTL/mixcol.vhd
A4_SC1_KC1/HDL/RTL/mixcolumn.vhd
A4_SC1_KC1/HDL/RTL/mux128.vhd
A4_SC1_KC1/HDL/RTL/reg.vhd
A4_SC1_KC1/HDL/RTL/sbox.vhd
A4_SC1_KC1/HDL/RTL/sboxed.vhd
A4_SC1_KC1/HDL/RTL/shiftrows.vhd
A4_SC1_KC1/HDL/RTL/sreg.vhd
A4_SC1_KC1/HDL/RTL/texpand.vhd
A4_SC1_KC1/HDL/RTL/xtime.vhd
A4_SC1_KC1/HDL/RTL/xxtime.vhd
A(dir)4_SC1_KC1/HDL/TBENCH/
A4_SC1_KC1/HDL/TBENCH/forkaes_tb.vhd
A4_SC1_KC1/sc1_kc1_cg.pdf
A4_SC1_KC1/sc1_kc1_cg.svg
A(dir)4_SC1_KC1/test_cases/
A4_SC1_KC1/test_cases/case_generator.c
A4_SC1_KC1/test_cases/in_avg.txt
A4_SC1_KC1/test_cases/in_dec.txt
A4_SC1_KC1/test_cases/in_enc.txt
A4_SC1_KC1/test_cases/in_rec.txt
A4_SC1_KC1/test_cases/out_avg.txt
A4_SC1_KC1/test_cases/out_dec.txt
A4_SC1_KC1/test_cases/out_enc.txt
A4_SC1_KC1/test_cases/out_rec.txt
A(dir)5_SC1_KC2_TC/
A(dir)5_SC1_KC2_TC/HDL/
A(dir)5_SC1_KC2_TC/HDL/RTL/
A5_SC1_KC2_TC/HDL/RTL/andmask.vhd
A5_SC1_KC2_TC/HDL/RTL/circ_mult.vhd
A5_SC1_KC2_TC/HDL/RTL/enc.vhd
A5_SC1_KC2_TC/HDL/RTL/forkaes.vhd
A5_SC1_KC2_TC/HDL/RTL/imixcol.vhd
A5_SC1_KC2_TC/HDL/RTL/invmixcol.vhd
A5_SC1_KC2_TC/HDL/RTL/ishiftrows.vhd
A5_SC1_KC2_TC/HDL/RTL/keygen.vhd
A5_SC1_KC2_TC/HDL/RTL/kreg.vhd
A5_SC1_KC2_TC/HDL/RTL/mixcol.vhd
A5_SC1_KC2_TC/HDL/RTL/mixcolumn.vhd
A5_SC1_KC2_TC/HDL/RTL/mux128.vhd
A5_SC1_KC2_TC/HDL/RTL/reg.vhd
A5_SC1_KC2_TC/HDL/RTL/sbox.vhd
A5_SC1_KC2_TC/HDL/RTL/sboxed.vhd
A5_SC1_KC2_TC/HDL/RTL/shiftrows.vhd
A5_SC1_KC2_TC/HDL/RTL/texpand.vhd
A5_SC1_KC2_TC/HDL/RTL/xtime.vhd
A5_SC1_KC2_TC/HDL/RTL/xxtime.vhd
A(dir)5_SC1_KC2_TC/HDL/TBENCH/
A5_SC1_KC2_TC/HDL/TBENCH/forkaes_tb.vhd
A5_SC1_KC2_TC/sc1_kc2_tc.pdf
A5_SC1_KC2_TC/sc1_kc2_tc.svg
A(dir)5_SC1_KC2_TC/test_cases/
A5_SC1_KC2_TC/test_cases/case_generator.c
A5_SC1_KC2_TC/test_cases/in_avg.txt
A5_SC1_KC2_TC/test_cases/in_dec.txt
A5_SC1_KC2_TC/test_cases/in_enc.txt
A5_SC1_KC2_TC/test_cases/in_rec.txt
A5_SC1_KC2_TC/test_cases/out_avg.txt
A5_SC1_KC2_TC/test_cases/out_dec.txt
A5_SC1_KC2_TC/test_cases/out_enc.txt
A5_SC1_KC2_TC/test_cases/out_rec.txt
A(dir)Configuration_A/
AConfiguration_A/ED.txt
A(dir)Configuration_A/HDL/
A(dir)Configuration_A/HDL/RTL/
AConfiguration_A/HDL/RTL/AES128.vhdl~
AConfiguration_A/HDL/RTL/BIGCOL.vhdl
AConfiguration_A/HDL/RTL/COL.vhdl
AConfiguration_A/HDL/RTL/Dff_Mux.vhdl
AConfiguration_A/HDL/RTL/Dff_Mux.vhdl~
AConfiguration_A/HDL/RTL/Dff_MuxE.vhdl
AConfiguration_A/HDL/RTL/Dff_MuxE.vhdl~
AConfiguration_A/HDL/RTL/Dff_R.vhdl
AConfiguration_A/HDL/RTL/Dff_S.vhdl
AConfiguration_A/HDL/RTL/Dff_en.vhdl
AConfiguration_A/HDL/RTL/GF16_INV.vhdl
AConfiguration_A/HDL/RTL/GF16_MUL.vhdl
AConfiguration_A/HDL/RTL/GF16_SQ_SCnu.vhdl
AConfiguration_A/HDL/RTL/GF256_INV.vhdl
AConfiguration_A/HDL/RTL/GF4_MUL.vhdl
AConfiguration_A/HDL/RTL/GF4_MUL_SCLw2.vhdl
AConfiguration_A/HDL/RTL/GF4_SQ.vhdl
AConfiguration_A/HDL/RTL/GF4_ScW
AConfiguration_A/HDL/RTL/GF4_ScW.vhdl
AConfiguration_A/HDL/RTL/GF4_ScW2.vhdl
A(dir)Configuration_A/HDL/RTL/LFSR21/
AConfiguration_A/HDL/RTL/LFSR21.vhdl
AConfiguration_A/HDL/RTL/LFSR21/Dff_R.vhdl
AConfiguration_A/HDL/RTL/LFSR21/Dff_S.vhdl
AConfiguration_A/HDL/RTL/LFSR21/LFSR21.vhdl
AConfiguration_A/HDL/RTL/LFSR21/a.c
AConfiguration_A/HDL/RTL/LFSR21/a.c~
AConfiguration_A/HDL/RTL/LFSR21/a.out
AConfiguration_A/HDL/RTL/M10C.vhdl
AConfiguration_A/HDL/RTL/MC2.vhd
AConfiguration_A/HDL/RTL/MC3.vhd
AConfiguration_A/HDL/RTL/MC3.vhd~
AConfiguration_A/HDL/RTL/MC4.vhd
AConfiguration_A/HDL/RTL/MC5.vhd
AConfiguration_A/HDL/RTL/Mux21.vhdl
AConfiguration_A/HDL/RTL/Mux32_21.vhdl
AConfiguration_A/HDL/RTL/Mux8_21.vhdl
AConfiguration_A/HDL/RTL/Opreg128.vhdl
AConfiguration_A/HDL/RTL/Rcon.vhdl
A(dir)Configuration_A/HDL/RTL/SBOX/
AConfiguration_A/HDL/RTL/SBOX.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF16_INV.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF16_MUL.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF16_SQ_SCnu.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF256_INV.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF4_MUL.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF4_MUL_SCLw2.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF4_SQ.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF4_ScW
AConfiguration_A/HDL/RTL/SBOX/GF4_ScW.vhdl
AConfiguration_A/HDL/RTL/SBOX/GF4_ScW2.vhdl
AConfiguration_A/HDL/RTL/SBOX/SBOX.cr.mti
AConfiguration_A/HDL/RTL/SBOX/SBOX.mpf
AConfiguration_A/HDL/RTL/SBOX/SBOX.vhdl
AConfiguration_A/HDL/RTL/SBOX/SBOX.vhdl~
AConfiguration_A/HDL/RTL/SBOX/SBOXTB.vhdl
AConfiguration_A/HDL/RTL/SBOX/SBOXTB.vhdl~
AConfiguration_A/HDL/RTL/SBOX/a.c
AConfiguration_A/HDL/RTL/SBOX/a.c~
AConfiguration_A/HDL/RTL/SBOX/a.out
AConfiguration_A/HDL/RTL/SBOX/b.c
AConfiguration_A/HDL/RTL/SBOX/b.c~
AConfiguration_A/HDL/RTL/SBOX/ed.vec
AConfiguration_A/HDL/RTL/SBOX/inprand.vec
AConfiguration_A/HDL/RTL/SBOX/l.vec
AConfiguration_A/HDL/RTL/SBOX/vsim.wlf
A(dir)Configuration_A/HDL/RTL/SBOX/work/
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf16_inv/
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AConfiguration_A/HDL/RTL/SBOX/work/gf16_inv/_primary.dbs
AConfiguration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dat
AConfiguration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dbs
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf16_mul/
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf256_inv/
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AConfiguration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dbs
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf4_mul/
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AConfiguration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dat
AConfiguration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dbs
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/
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AConfiguration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dbs
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A(dir)Configuration_A/HDL/RTL/SBOX/work/gf4_scw/
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AConfiguration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.dbs
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AConfiguration_A/HDL/RTL/SBOX/work/sbox/aessbox.dat
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A(dir)Configuration_A/HDL/RTL/SBOX/work/sboxtb/
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AConfiguration_A/HDL/RTL/SBOX/work/sboxtb/_primary.dbs
AConfiguration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.dat
AConfiguration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.dbs
AConfiguration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.prw
AConfiguration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.psm
AConfiguration_A/HDL/RTL/SBOXED.vhdl
AConfiguration_A/HDL/RTL/SBOXL.vhdl
AConfiguration_A/HDL/RTL/STAGE.vhdl
AConfiguration_A/HDL/RTL/STAGE.vhdl~
AConfiguration_A/HDL/RTL/STAGEe.vhdl
AConfiguration_A/HDL/RTL/STAGEk.vhdl
AConfiguration_A/HDL/RTL/STAGEk.vhdl~
AConfiguration_A/HDL/RTL/STAGEn.vhdl
AConfiguration_A/HDL/RTL/ShiftReg128.vhdl
A(dir)Configuration_A/HDL/RTL/T160/
AConfiguration_A/HDL/RTL/T160/.synopsys_dc.setup
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AConfiguration_A/Key8.txt
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A(dir)Configuration_B/
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AConfiguration_B/HDL/RTL/Dff_MuxE.vhdl
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AConfiguration_B/HDL/RTL/GF16_INV.vhdl
AConfiguration_B/HDL/RTL/GF16_MUL.vhdl
AConfiguration_B/HDL/RTL/GF16_SQ_SCnu.vhdl
AConfiguration_B/HDL/RTL/GF256_INV.vhdl
AConfiguration_B/HDL/RTL/GF4_MUL.vhdl
AConfiguration_B/HDL/RTL/GF4_MUL_SCLw2.vhdl
AConfiguration_B/HDL/RTL/GF4_SQ.vhdl
AConfiguration_B/HDL/RTL/GF4_ScW
AConfiguration_B/HDL/RTL/GF4_ScW.vhdl
AConfiguration_B/HDL/RTL/GF4_ScW2.vhdl
A(dir)Configuration_B/HDL/RTL/LFSR21/
AConfiguration_B/HDL/RTL/LFSR21.vhdl
AConfiguration_B/HDL/RTL/LFSR21/Dff_R.vhdl
AConfiguration_B/HDL/RTL/LFSR21/Dff_S.vhdl
AConfiguration_B/HDL/RTL/LFSR21/LFSR21.vhdl
AConfiguration_B/HDL/RTL/LFSR21/a.c
AConfiguration_B/HDL/RTL/LFSR21/a.c~
AConfiguration_B/HDL/RTL/LFSR21/a.out
AConfiguration_B/HDL/RTL/M10C.vhdl
AConfiguration_B/HDL/RTL/MC2.vhd
AConfiguration_B/HDL/RTL/MC3.vhd
AConfiguration_B/HDL/RTL/MC3.vhd~
AConfiguration_B/HDL/RTL/MC4.vhd
AConfiguration_B/HDL/RTL/MC5.vhd
AConfiguration_B/HDL/RTL/Mux21.vhdl
AConfiguration_B/HDL/RTL/Mux32_21.vhdl
AConfiguration_B/HDL/RTL/Mux8_21.vhdl
AConfiguration_B/HDL/RTL/Opreg128.vhdl
AConfiguration_B/HDL/RTL/Rcon.vhdl
A(dir)Configuration_B/HDL/RTL/SBOX/
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AConfiguration_B/HDL/RTL/SBOX/GF16_INV.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF16_MUL.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF16_SQ_SCnu.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF256_INV.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF4_MUL.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF4_MUL_SCLw2.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF4_SQ.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF4_ScW
AConfiguration_B/HDL/RTL/SBOX/GF4_ScW.vhdl
AConfiguration_B/HDL/RTL/SBOX/GF4_ScW2.vhdl
AConfiguration_B/HDL/RTL/SBOX/SBOX.cr.mti
AConfiguration_B/HDL/RTL/SBOX/SBOX.mpf
AConfiguration_B/HDL/RTL/SBOX/SBOX.vhdl
AConfiguration_B/HDL/RTL/SBOX/SBOX.vhdl~
AConfiguration_B/HDL/RTL/SBOX/SBOXTB.vhdl
AConfiguration_B/HDL/RTL/SBOX/SBOXTB.vhdl~
AConfiguration_B/HDL/RTL/SBOX/a.c
AConfiguration_B/HDL/RTL/SBOX/a.c~
AConfiguration_B/HDL/RTL/SBOX/a.out
AConfiguration_B/HDL/RTL/SBOX/b.c
AConfiguration_B/HDL/RTL/SBOX/b.c~
AConfiguration_B/HDL/RTL/SBOX/ed.vec
AConfiguration_B/HDL/RTL/SBOX/inprand.vec
AConfiguration_B/HDL/RTL/SBOX/l.vec
AConfiguration_B/HDL/RTL/SBOX/vsim.wlf
A(dir)Configuration_B/HDL/RTL/SBOX/work/
AConfiguration_B/HDL/RTL/SBOX/work/_info
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AConfiguration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.prw
AConfiguration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.psm
A(dir)Configuration_B/HDL/RTL/SBOX/work/gf16_mul/
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/_primary.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/_primary.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.prw
AConfiguration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.psm
A(dir)Configuration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.prw
AConfiguration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.psm
A(dir)Configuration_B/HDL/RTL/SBOX/work/gf256_inv/
AConfiguration_B/HDL/RTL/SBOX/work/gf256_inv/_primary.dat
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AConfiguration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.prw
AConfiguration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.psm
A(dir)Configuration_B/HDL/RTL/SBOX/work/gf4_mul/
AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul/_primary.dat
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AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul/gf4mul.prw
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A(dir)Configuration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/
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AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.prw
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A(dir)Configuration_B/HDL/RTL/SBOX/work/gf4_scw/
AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw/_primary.dat
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AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw/g4scw.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw/g4scw.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw/g4scw.prw
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A(dir)Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/
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AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.prw
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A(dir)Configuration_B/HDL/RTL/SBOX/work/gf4_sq/
AConfiguration_B/HDL/RTL/SBOX/work/gf4_sq/_primary.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_sq/_primary.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.dat
AConfiguration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.dbs
AConfiguration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.prw
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A(dir)Configuration_B/HDL/RTL/SBOX/work/sbox/
AConfiguration_B/HDL/RTL/SBOX/work/sbox/_primary.dat
AConfiguration_B/HDL/RTL/SBOX/work/sbox/_primary.dbs
AConfiguration_B/HDL/RTL/SBOX/work/sbox/aessbox.dat
AConfiguration_B/HDL/RTL/SBOX/work/sbox/aessbox.dbs
AConfiguration_B/HDL/RTL/SBOX/work/sbox/aessbox.prw
AConfiguration_B/HDL/RTL/SBOX/work/sbox/aessbox.psm
A(dir)Configuration_B/HDL/RTL/SBOX/work/sboxtb/
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/_primary.dat
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/_primary.dbs
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.dat
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.dbs
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.prw
AConfiguration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.psm
AConfiguration_B/HDL/RTL/SBOXED.vhdl
AConfiguration_B/HDL/RTL/SBOXL.vhdl
AConfiguration_B/HDL/RTL/STAGE.vhdl
AConfiguration_B/HDL/RTL/STAGE.vhdl~
AConfiguration_B/HDL/RTL/STAGEe.vhdl
AConfiguration_B/HDL/RTL/STAGEk.vhdl
AConfiguration_B/HDL/RTL/STAGEk.vhdl~
AConfiguration_B/HDL/RTL/STAGEn.vhdl
AConfiguration_B/HDL/RTL/ShiftReg128.vhdl
AConfiguration_B/HDL/RTL/aes.vhdl
AConfiguration_B/HDL/RTL/aes.vhdl~
AConfiguration_B/HDL/RTL/aes1.vhd
AConfiguration_B/HDL/RTL/aes1.vhd~
AConfiguration_B/HDL/RTL/aes20.vhdl
AConfiguration_B/HDL/RTL/aes20.vhdl~
AConfiguration_B/HDL/RTL/aes_small.vhdl
AConfiguration_B/HDL/RTL/aes_small.vhdl~
AConfiguration_B/HDL/RTL/aescg.vhd
AConfiguration_B/HDL/RTL/aesv2.vhdl
AConfiguration_B/HDL/RTL/aesv2_tb.vhdl
AConfiguration_B/HDL/RTL/aesv3.vhdl
AConfiguration_B/HDL/RTL/aesv3b.vhdl
AConfiguration_B/HDL/RTL/aesv3f.vhdl
AConfiguration_B/HDL/RTL/cgate.vhd
AConfiguration_B/HDL/RTL/cgate1.vhd
AConfiguration_B/HDL/RTL/comp.vhd
AConfiguration_B/HDL/RTL/eff.vhd
AConfiguration_B/HDL/RTL/eff1.vhd
AConfiguration_B/HDL/RTL/ereg.vhd
AConfiguration_B/HDL/RTL/forkaesv0.vhdl
AConfiguration_B/HDL/RTL/forkaesv00.vhdl
AConfiguration_B/HDL/RTL/forkaesv01.vhdl
AConfiguration_B/HDL/RTL/forkaesv02.vhdl
AConfiguration_B/HDL/RTL/forkaesv10.vhdl
AConfiguration_B/HDL/RTL/mixcolumn.vhd
AConfiguration_B/HDL/RTL/mulenc.vhd
AConfiguration_B/HDL/RTL/to.c
AConfiguration_B/HDL/RTL/xtime.vhd
AConfiguration_B/HDL/RTL/xxtime.vhd
A(dir)Configuration_B/HDL/TBENCH/
AConfiguration_B/HDL/TBENCH/AES128TB.vhdl.bak
AConfiguration_B/HDL/TBENCH/PresentSerialTB.vhdl
AConfiguration_B/HDL/TBENCH/PresentSerialTB.vhdl.bak
AConfiguration_B/HDL/TBENCH/PresentTB.vhdl
AConfiguration_B/HDL/TBENCH/SBOXTB.vhdl
AConfiguration_B/HDL/TBENCH/SBOXTB.vhdl.bak
AConfiguration_B/HDL/TBENCH/aes_tb.vhdl
AConfiguration_B/HDL/TBENCH/aes_tb.vhdl.bak
AConfiguration_B/HDL/TBENCH/aes_tb.vhdl~
AConfiguration_B/HDL/TBENCH/aesv2_tb.vhdl
AConfiguration_B/HDL/TBENCH/forkv0_tb.vhdl
AConfiguration_B/HDL/TBENCH/forkv0_tb.vhdl.bak
AConfiguration_B/HDL/TBENCH/forkv1_tb.vhdl
AConfiguration_B/Key.txt
AConfiguration_B/Key8.txt
AConfiguration_B/Mode.txt
AConfiguration_B/PT.txt
AConfiguration_B/PT8.txt
AConfiguration_B/gen.c
AConfiguration_B/post.sh
AConfiguration_B/power_lp.tcl
AConfiguration_B/saif.cmd
AConfiguration_B/script.tcl
A(dir)synopsis_scripts/
Asynopsis_scripts/.synopsys_dc.setup
Asynopsis_scripts/README
Asynopsis_scripts/post.sh
Asynopsis_scripts/power.tcl
Asynopsis_scripts/saif.cmd
Asynopsis_scripts/script_lp.tcl

R9435:3fca2cd977ef

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1_SC1_KC1_TC/HDL/RTL/andmask.vhd

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1_SC1_KC1_TC/HDL/RTL/circ_mult.vhd

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1_SC1_KC1_TC/HDL/RTL/enc.vhd

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1_SC1_KC1_TC/HDL/RTL/forkaes.vhd

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1_SC1_KC1_TC/HDL/RTL/imixcol.vhd

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1_SC1_KC1_TC/HDL/RTL/invmixcol.vhd

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1_SC1_KC1_TC/HDL/RTL/ishiftrows.vhd

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1_SC1_KC1_TC/HDL/RTL/keygen.vhd

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1_SC1_KC1_TC/HDL/RTL/mixcol.vhd

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1_SC1_KC1_TC/HDL/RTL/mixcolumn.vhd

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1_SC1_KC1_TC/HDL/RTL/mux128.vhd

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1_SC1_KC1_TC/HDL/RTL/reg.vhd

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1_SC1_KC1_TC/HDL/RTL/sbox.vhd

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1_SC1_KC1_TC/HDL/RTL/sboxed.vhd

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1_SC1_KC1_TC/HDL/RTL/shiftrows.vhd

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1_SC1_KC1_TC/HDL/RTL/texpand.vhd

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1_SC1_KC1_TC/HDL/RTL/xtime.vhd

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1_SC1_KC1_TC/HDL/RTL/xxtime.vhd

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1_SC1_KC1_TC/HDL/TBENCH/forkaes_tb.vhd

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1_SC1_KC1_TC/sc1_kc1_tc.pdf

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1_SC1_KC1_TC/sc1_kc1_tc.svg

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1_SC1_KC1_TC/test_cases/case_generator.c

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1_SC1_KC1_TC/test_cases/in_avg.txt

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1_SC1_KC1_TC/test_cases/in_dec.txt

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1_SC1_KC1_TC/test_cases/in_enc.txt

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1_SC1_KC1_TC/test_cases/in_rec.txt

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1_SC1_KC1_TC/test_cases/out_avg.txt

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1_SC1_KC1_TC/test_cases/out_dec.txt

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1_SC1_KC1_TC/test_cases/out_enc.txt

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1_SC1_KC1_TC/test_cases/out_rec.txt

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2_SC1_KC1_TC_cg/HDL/RTL/andmask.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/circ_mult.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/clockgater.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/controller.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/enc.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/forkaes.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/imixcol.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/invmixcol.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/ishiftrows.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/keygen.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/mixcol.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/mixcolumn.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/mux128.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/reg.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/sbox.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/sboxed.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/shiftrows.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/texpand.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/xtime.vhd

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2_SC1_KC1_TC_cg/HDL/RTL/xxtime.vhd

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2_SC1_KC1_TC_cg/HDL/TBENCH/forkaes_tb.vhd

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2_SC1_KC1_TC_cg/sc1_kc1_tc_cg.pdf

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2_SC1_KC1_TC_cg/sc1_kc1_tc_cg.svg

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2_SC1_KC1_TC_cg/test_cases/case_generator.c

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2_SC1_KC1_TC_cg/test_cases/in_avg.txt

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2_SC1_KC1_TC_cg/test_cases/in_dec.txt

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2_SC1_KC1_TC_cg/test_cases/in_enc.txt

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2_SC1_KC1_TC_cg/test_cases/in_rec.txt

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2_SC1_KC1_TC_cg/test_cases/out_avg.txt

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2_SC1_KC1_TC_cg/test_cases/out_dec.txt

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2_SC1_KC1_TC_cg/test_cases/out_enc.txt

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2_SC1_KC1_TC_cg/test_cases/out_rec.txt

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3_SC2_KC1_TC/HDL/RTL/andmask.vhd

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3_SC2_KC1_TC/HDL/RTL/circ_mult.vhd

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3_SC2_KC1_TC/HDL/RTL/clockgater.vhd

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3_SC2_KC1_TC/HDL/RTL/controller.vhd

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3_SC2_KC1_TC/HDL/RTL/decoder.vhd

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3_SC2_KC1_TC/HDL/RTL/enc.vhd

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3_SC2_KC1_TC/HDL/RTL/forkaes.vhd

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3_SC2_KC1_TC/HDL/RTL/imixcol.vhd

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3_SC2_KC1_TC/HDL/RTL/invmixcol.vhd

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3_SC2_KC1_TC/HDL/RTL/isbox.vhd

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3_SC2_KC1_TC/HDL/RTL/ishiftrows.vhd

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3_SC2_KC1_TC/HDL/RTL/keygen.vhd

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3_SC2_KC1_TC/HDL/RTL/mixcol.vhd

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3_SC2_KC1_TC/HDL/RTL/mixcolumn.vhd

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3_SC2_KC1_TC/HDL/RTL/mux128.vhd

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3_SC2_KC1_TC/HDL/RTL/reg.vhd

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3_SC2_KC1_TC/HDL/RTL/sbox.vhd

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3_SC2_KC1_TC/HDL/RTL/shiftrows.vhd

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3_SC2_KC1_TC/HDL/RTL/texpand.vhd

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3_SC2_KC1_TC/HDL/RTL/xtime.vhd

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3_SC2_KC1_TC/HDL/RTL/xxtime.vhd

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3_SC2_KC1_TC/HDL/TBENCH/forkaes_tb.vhd

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3_SC2_KC1_TC/sc2_kc1_tc.pdf

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3_SC2_KC1_TC/sc2_kc1_tc.svg

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3_SC2_KC1_TC/test_cases/case_generator.c

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3_SC2_KC1_TC/test_cases/in_avg.txt

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3_SC2_KC1_TC/test_cases/in_dec.txt

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3_SC2_KC1_TC/test_cases/in_enc.txt

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3_SC2_KC1_TC/test_cases/in_rec.txt

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3_SC2_KC1_TC/test_cases/out_avg.txt

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3_SC2_KC1_TC/test_cases/out_dec.txt

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3_SC2_KC1_TC/test_cases/out_enc.txt

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3_SC2_KC1_TC/test_cases/out_rec.txt

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4_SC1_KC1/HDL/RTL/andmask.vhd

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4_SC1_KC1/HDL/RTL/circ_mult.vhd

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4_SC1_KC1/HDL/RTL/clockgater.vhd

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4_SC1_KC1/HDL/RTL/controller.vhd

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4_SC1_KC1/HDL/RTL/enc.vhd

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4_SC1_KC1/HDL/RTL/forkaes.vhd

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4_SC1_KC1/HDL/RTL/imixcol.vhd

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4_SC1_KC1/HDL/RTL/invmixcol.vhd

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4_SC1_KC1/HDL/RTL/ishiftrows.vhd

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4_SC1_KC1/HDL/RTL/keygen.vhd

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4_SC1_KC1/HDL/RTL/mixcol.vhd

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4_SC1_KC1/HDL/RTL/mixcolumn.vhd

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4_SC1_KC1/HDL/RTL/mux128.vhd

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4_SC1_KC1/HDL/RTL/reg.vhd

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4_SC1_KC1/HDL/RTL/sbox.vhd

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4_SC1_KC1/HDL/RTL/sboxed.vhd

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4_SC1_KC1/HDL/RTL/shiftrows.vhd

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4_SC1_KC1/HDL/RTL/sreg.vhd

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4_SC1_KC1/HDL/RTL/texpand.vhd

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4_SC1_KC1/HDL/RTL/xtime.vhd

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4_SC1_KC1/HDL/RTL/xxtime.vhd

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4_SC1_KC1/HDL/TBENCH/forkaes_tb.vhd

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4_SC1_KC1/sc1_kc1_cg.pdf

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4_SC1_KC1/sc1_kc1_cg.svg

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4_SC1_KC1/test_cases/case_generator.c

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4_SC1_KC1/test_cases/in_avg.txt

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4_SC1_KC1/test_cases/in_dec.txt

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4_SC1_KC1/test_cases/in_enc.txt

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4_SC1_KC1/test_cases/in_rec.txt

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4_SC1_KC1/test_cases/out_avg.txt

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4_SC1_KC1/test_cases/out_dec.txt

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4_SC1_KC1/test_cases/out_enc.txt

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4_SC1_KC1/test_cases/out_rec.txt

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5_SC1_KC2_TC/HDL/RTL/andmask.vhd

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5_SC1_KC2_TC/HDL/RTL/circ_mult.vhd

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5_SC1_KC2_TC/HDL/RTL/enc.vhd

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5_SC1_KC2_TC/HDL/RTL/forkaes.vhd

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5_SC1_KC2_TC/HDL/RTL/imixcol.vhd

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5_SC1_KC2_TC/HDL/RTL/invmixcol.vhd

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5_SC1_KC2_TC/HDL/RTL/ishiftrows.vhd

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5_SC1_KC2_TC/HDL/RTL/keygen.vhd

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5_SC1_KC2_TC/HDL/RTL/kreg.vhd

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5_SC1_KC2_TC/HDL/RTL/mixcol.vhd

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5_SC1_KC2_TC/HDL/RTL/mixcolumn.vhd

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5_SC1_KC2_TC/HDL/RTL/mux128.vhd

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5_SC1_KC2_TC/HDL/RTL/reg.vhd

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5_SC1_KC2_TC/HDL/RTL/sbox.vhd

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5_SC1_KC2_TC/HDL/RTL/sboxed.vhd

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5_SC1_KC2_TC/HDL/RTL/shiftrows.vhd

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5_SC1_KC2_TC/HDL/RTL/texpand.vhd

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5_SC1_KC2_TC/HDL/RTL/xtime.vhd

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5_SC1_KC2_TC/HDL/RTL/xxtime.vhd

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5_SC1_KC2_TC/HDL/TBENCH/forkaes_tb.vhd

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5_SC1_KC2_TC/sc1_kc2_tc.pdf

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5_SC1_KC2_TC/sc1_kc2_tc.svg

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5_SC1_KC2_TC/test_cases/case_generator.c

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5_SC1_KC2_TC/test_cases/in_avg.txt

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5_SC1_KC2_TC/test_cases/in_dec.txt

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5_SC1_KC2_TC/test_cases/in_enc.txt

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5_SC1_KC2_TC/test_cases/out_enc.txt

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5_SC1_KC2_TC/test_cases/out_rec.txt

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Configuration_A/ED.txt

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Configuration_A/HDL/RTL/AES128.vhdl~

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Configuration_A/HDL/RTL/BIGCOL.vhdl

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Configuration_A/HDL/RTL/COL.vhdl

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Configuration_A/HDL/RTL/Dff_Mux.vhdl

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Configuration_A/HDL/RTL/Dff_Mux.vhdl~

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Configuration_A/HDL/RTL/Dff_MuxE.vhdl

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Configuration_A/HDL/RTL/Dff_MuxE.vhdl~

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Configuration_A/HDL/RTL/Dff_en.vhdl

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Configuration_A/HDL/RTL/GF16_INV.vhdl

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Configuration_A/HDL/RTL/GF16_MUL.vhdl

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Configuration_A/HDL/RTL/GF16_SQ_SCnu.vhdl

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Configuration_A/HDL/RTL/GF256_INV.vhdl

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Configuration_A/HDL/RTL/GF4_MUL.vhdl

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Configuration_A/HDL/RTL/GF4_MUL_SCLw2.vhdl

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Configuration_A/HDL/RTL/GF4_ScW2.vhdl

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Configuration_A/HDL/RTL/LFSR21.vhdl

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Configuration_A/HDL/RTL/LFSR21/LFSR21.vhdl

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Configuration_A/HDL/RTL/LFSR21/a.c

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Configuration_A/HDL/RTL/LFSR21/a.c~

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Configuration_A/HDL/RTL/M10C.vhdl

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Configuration_A/HDL/RTL/MC2.vhd

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Configuration_A/HDL/RTL/MC3.vhd

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Configuration_A/HDL/RTL/MC3.vhd~

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Configuration_A/HDL/RTL/MC4.vhd

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Configuration_A/HDL/RTL/MC5.vhd

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Configuration_A/HDL/RTL/Mux21.vhdl

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Configuration_A/HDL/RTL/Mux32_21.vhdl

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Configuration_A/HDL/RTL/Mux8_21.vhdl

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Configuration_A/HDL/RTL/Opreg128.vhdl

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Configuration_A/HDL/RTL/Rcon.vhdl

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Configuration_A/HDL/RTL/SBOX.vhdl

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Configuration_A/HDL/RTL/SBOX/GF16_INV.vhdl

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Configuration_A/HDL/RTL/SBOX/GF16_MUL.vhdl

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Configuration_A/HDL/RTL/SBOX/GF16_SQ_SCnu.vhdl

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Configuration_A/HDL/RTL/SBOX/GF256_INV.vhdl

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Configuration_A/HDL/RTL/SBOX/GF4_MUL.vhdl

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Configuration_A/HDL/RTL/SBOX/GF4_MUL_SCLw2.vhdl

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Configuration_A/HDL/RTL/SBOX/SBOX.vhdl

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Configuration_A/HDL/RTL/SBOX/SBOX.vhdl~

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Configuration_A/HDL/RTL/SBOX/SBOXTB.vhdl

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Configuration_A/HDL/RTL/SBOX/SBOXTB.vhdl~

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Configuration_A/HDL/RTL/SBOX/a.c

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Configuration_A/HDL/RTL/SBOX/a.out

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Configuration_A/HDL/RTL/SBOX/b.c

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Configuration_A/HDL/RTL/SBOX/b.c~

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Configuration_A/HDL/RTL/SBOX/ed.vec

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Configuration_A/HDL/RTL/SBOX/inprand.vec

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Configuration_A/HDL/RTL/SBOX/l.vec

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Configuration_A/HDL/RTL/SBOX/vsim.wlf

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Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dat

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Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dbs

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Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.prw

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Configuration_A/HDL/RTL/SBOX/work/gf256_inv/_primary.dat

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Configuration_A/HDL/RTL/SBOX/work/gf256_inv/_primary.dbs

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Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dat

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Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dbs

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Configuration_A/HDL/RTL/SBOX/work/gf4_mul/_primary.dat

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Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.dat

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Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.prw

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Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dbs

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Configuration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.dbs

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Configuration_A/HDL/RTL/SBOXED.vhdl

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Configuration_A/HDL/RTL/SBOXL.vhdl

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Configuration_A/HDL/RTL/STAGE.vhdl

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Configuration_A/HDL/RTL/STAGE.vhdl~

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Configuration_A/HDL/RTL/STAGEe.vhdl

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Configuration_A/HDL/RTL/STAGEk.vhdl

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Configuration_A/HDL/RTL/STAGEk.vhdl~

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Configuration_A/HDL/RTL/STAGEn.vhdl

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Configuration_A/HDL/RTL/ShiftReg128.vhdl

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Configuration_A/HDL/RTL/T160/.synopsys_dc.setup

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Configuration_A/HDL/RTL/T160/.vcs_lib_lock

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Configuration_A/HDL/RTL/T160/.vlogansetup.args

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Configuration_A/HDL/RTL/T160/.vlogansetup.env

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Configuration_A/HDL/RTL/T160/64/TRIVIUM_TB.mra

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Configuration_A/HDL/RTL/T160/64/TRIVIUM_TB.sim

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Configuration_A/HDL/RTL/T160/AN.DB/AllModulesSkeletons.db

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Configuration_A/HDL/RTL/T160/AN.DB/compunitcnt.db

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Configuration_A/HDL/RTL/T160/AN.DB/crc.db

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Configuration_A/HDL/RTL/T160/AN.DB/timescale.db

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Configuration_A/HDL/RTL/T160/PT.txt

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Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339_1.o

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Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339_2.o

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Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22340

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Configuration_A/HDL/RTL/T160/csrc/vh/sc_filelist

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Configuration_A/HDL/RTL/T160/csrc/vh/scsFilelist.c

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Configuration_A/HDL/RTL/T160/csrc/vh/scsFilelist.o

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Configuration_A/HDL/RTL/T160/csrc/vh/scscomm.c

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Configuration_A/HDL/RTL/T160/csrc/vh/scscomm.o

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Configuration_A/HDL/RTL/T160/default.svf

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Configuration_A/HDL/RTL/T160/gen.c

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Configuration_A/HDL/RTL/T160/gen.c~

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Configuration_A/HDL/RTL/T160/inter.vpd

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Configuration_A/HDL/RTL/T160/post.sh

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Configuration_A/HDL/RTL/T160/power_lp.tcl

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Configuration_A/HDL/RTL/T160/powercon_lp.txt

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Configuration_A/HDL/RTL/T160/powerhier_lp.txt

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Configuration_A/HDL/RTL/T160/pre.sh

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Configuration_A/HDL/RTL/T160/saif.cmd

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Configuration_A/HDL/RTL/T160/scirocco_command.log

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Configuration_A/HDL/RTL/T160/script_lp.tcl

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Configuration_A/HDL/RTL/T160/sdfAnnotateInfo

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Configuration_A/HDL/RTL/T160/simv

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Configuration_A/HDL/RTL/T160/simv.daidir/.version

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Configuration_A/HDL/RTL/T160/simv.daidir/AllModulesSkeletons.db

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Configuration_A/HDL/RTL/T160/simv.daidir/adhsoptmap.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/build_db

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Configuration_A/HDL/RTL/T160/simv.daidir/compat.db

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Configuration_A/HDL/RTL/T160/simv.daidir/covg_defs

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Configuration_A/HDL/RTL/T160/simv.daidir/crc.db

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf.MAX

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf.TYP

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.MAX

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.MIN

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.TYP

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf10.AUX

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf10.hs.AUX

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf1_0.MAIN

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Configuration_A/HDL/RTL/T160/simv.daidir/csdf1_0.hs.MAIN

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Configuration_A/HDL/RTL/T160/simv.daidir/didmap.db

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Configuration_A/HDL/RTL/T160/simv.daidir/dumpcheck.db

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Configuration_A/HDL/RTL/T160/simv.daidir/dve_debug.db

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Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_fileindex.db

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Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filename.db

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Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filenode.db

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Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filespace.db

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Configuration_A/HDL/RTL/T160/simv.daidir/external_functions

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Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf1.db

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Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf2.db

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Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf3.db

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Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf4.db

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Configuration_A/HDL/RTL/T160/simv.daidir/hsim_gbl_node.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/hsim_root_sig.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/hsim_vpdopt_op_ip_map.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/ilcgSigAttrUsed

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Configuration_A/HDL/RTL/T160/simv.daidir/modfilename.db

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Configuration_A/HDL/RTL/T160/simv.daidir/mxmap.db

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Configuration_A/HDL/RTL/T160/simv.daidir/mxopt.db

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Configuration_A/HDL/RTL/T160/simv.daidir/mxsetup.db

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Configuration_A/HDL/RTL/T160/simv.daidir/offfilename.db

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Configuration_A/HDL/RTL/T160/simv.daidir/rmapats.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/.mhdlinst.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/DUMMY_MHDL_CFG_TRIVIUM_TB.sim

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/dummyVhConfig.vhd

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/ilcgDuIds

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/mdb.dui

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/sc_efile

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/sc_loadlist

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Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/scsim.db.file

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Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/sdf_vhdl_el.in

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Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/sdf_vhdl_rt.in

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Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/trivium-syn.sdf

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Configuration_A/HDL/RTL/T160/simv.daidir/str.db

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Configuration_A/HDL/RTL/T160/simv.daidir/tt_fileindex.db

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Configuration_A/HDL/RTL/T160/simv.daidir/tt_filespace.db

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Configuration_A/HDL/RTL/T160/simv.daidir/unielab.mx

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Configuration_A/HDL/RTL/T160/simv.daidir/unielab.vhtop

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Configuration_A/HDL/RTL/T160/simv.daidir/vcs_rebuild

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_elabmod_insts.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_elabout.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_fs.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_mimo_tables.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_tables.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_vecconst.dat

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsdef.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsdefbe.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_elab.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_fegate.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_gate.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_lvl.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_merge.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_mnmn.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_partition.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_vcselabref.db

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Configuration_A/HDL/RTL/T160/simv.daidir/version.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vir_fileindex.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vir_filenode.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vir_filespace.db

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Configuration_A/HDL/RTL/T160/simv.daidir/vloganopts.db

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Configuration_A/HDL/RTL/T160/timing_lp.txt

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Configuration_A/HDL/RTL/T160/trivium-full_timing.saif

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Configuration_A/HDL/RTL/T160/trivium-syn.sdf

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Configuration_A/HDL/RTL/T160/trivium-syn.v

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Configuration_A/HDL/RTL/T160/trivium.ddc

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Configuration_A/HDL/RTL/T160/trivium.sdc

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Configuration_A/HDL/RTL/T160/trivium.vhdl

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Configuration_A/HDL/RTL/T160/ucli.key

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Configuration_A/HDL/RTL/T160/vsim.wlf

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Configuration_A/HDL/RTL/aes.vhdl

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Configuration_A/HDL/RTL/aes.vhdl~

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Configuration_A/HDL/RTL/aes1.vhd

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Configuration_A/HDL/RTL/aes1.vhd~

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Configuration_A/HDL/RTL/aes20.vhdl

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Configuration_A/HDL/RTL/aes20.vhdl~

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Configuration_A/HDL/RTL/aes_small.vhdl

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Configuration_A/HDL/RTL/aes_small.vhdl~

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Configuration_A/HDL/RTL/aescg.vhd

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Configuration_A/HDL/RTL/aesv2.vhdl

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Configuration_A/HDL/RTL/aesv2_tb.vhdl

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Configuration_A/HDL/RTL/aesv3.vhdl

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Configuration_A/HDL/RTL/aesv3b.vhdl

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Configuration_A/HDL/RTL/aesv3f.vhdl

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Configuration_A/HDL/RTL/cgate.vhd

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Configuration_A/HDL/RTL/comp.vhd

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Configuration_A/HDL/RTL/eff.vhd

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Configuration_A/HDL/RTL/eff1.vhd

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Configuration_A/HDL/RTL/forkaesv0.vhdl

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Configuration_A/HDL/RTL/forkaesv00.vhdl

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Configuration_A/HDL/RTL/forkaesv01.vhdl

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Configuration_A/HDL/RTL/forkaesv02.vhdl

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Configuration_A/HDL/RTL/mixcolumn.vhd

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Configuration_A/HDL/RTL/mulenc.vhd

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Configuration_A/HDL/RTL/to.c

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Configuration_A/HDL/RTL/xtime.vhd

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Configuration_A/HDL/RTL/xxtime.vhd

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Configuration_A/HDL/TBENCH/AES128TB.vhdl.bak

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Configuration_A/HDL/TBENCH/PresentSerialTB.vhdl

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Configuration_A/HDL/TBENCH/PresentSerialTB.vhdl.bak

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Configuration_A/HDL/TBENCH/PresentTB.vhdl

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Configuration_A/HDL/TBENCH/SBOXTB.vhdl

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Configuration_A/HDL/TBENCH/SBOXTB.vhdl.bak

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Configuration_A/HDL/TBENCH/aes_tb.vhdl

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Configuration_A/HDL/TBENCH/aes_tb.vhdl.bak

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Configuration_A/HDL/TBENCH/aes_tb.vhdl~

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Configuration_A/HDL/TBENCH/aesv2_tb.vhdl

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Configuration_A/HDL/TBENCH/forkv0_tb.vhdl

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Configuration_A/HDL/TBENCH/forkv0_tb.vhdl.bak

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Configuration_A/Key.txt

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Configuration_A/Key8.txt

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Configuration_A/Mode.txt

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Configuration_A/PT.txt

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Configuration_A/PT8.txt

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Configuration_A/post.sh

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Configuration_A/power_lp.tcl

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Configuration_A/saif.cmd

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Configuration_A/script.tcl

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Configuration_B/ED.txt

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Configuration_B/HDL/RTL/AES128.vhdl~

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Configuration_B/HDL/RTL/BIGCOL.vhdl

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Configuration_B/HDL/RTL/COL.vhdl

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Configuration_B/HDL/RTL/Dff_Mux.vhdl

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Configuration_B/HDL/RTL/Dff_Mux.vhdl~

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Configuration_B/HDL/RTL/Dff_MuxE.vhdl

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Configuration_B/HDL/RTL/Dff_MuxE.vhdl~

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Configuration_B/HDL/RTL/Dff_R.vhdl

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Configuration_B/HDL/RTL/Dff_S.vhdl

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Configuration_B/HDL/RTL/Dff_en.vhdl

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Configuration_B/HDL/RTL/GF16_INV.vhdl

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Configuration_B/HDL/RTL/GF16_MUL.vhdl

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Configuration_B/HDL/RTL/GF16_SQ_SCnu.vhdl

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Configuration_B/HDL/RTL/GF256_INV.vhdl

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Configuration_B/HDL/RTL/GF4_MUL.vhdl

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Configuration_B/HDL/RTL/GF4_MUL_SCLw2.vhdl

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Configuration_B/HDL/RTL/GF4_SQ.vhdl

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Configuration_B/HDL/RTL/GF4_ScW.vhdl

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Configuration_B/HDL/RTL/GF4_ScW2.vhdl

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Configuration_B/HDL/RTL/LFSR21.vhdl

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Configuration_B/HDL/RTL/LFSR21/Dff_R.vhdl

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Configuration_B/HDL/RTL/LFSR21/LFSR21.vhdl

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Configuration_B/HDL/RTL/LFSR21/a.c

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Configuration_B/HDL/RTL/LFSR21/a.c~

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Configuration_B/HDL/RTL/LFSR21/a.out

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Configuration_B/HDL/RTL/M10C.vhdl

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Configuration_B/HDL/RTL/MC2.vhd

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Configuration_B/HDL/RTL/MC3.vhd

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Configuration_B/HDL/RTL/MC3.vhd~

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Configuration_B/HDL/RTL/MC4.vhd

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Configuration_B/HDL/RTL/MC5.vhd

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Configuration_B/HDL/RTL/Mux21.vhdl

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Configuration_B/HDL/RTL/Mux32_21.vhdl

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Configuration_B/HDL/RTL/Mux8_21.vhdl

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Configuration_B/HDL/RTL/Opreg128.vhdl

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Configuration_B/HDL/RTL/Rcon.vhdl

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Configuration_B/HDL/RTL/SBOX.vhdl

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Configuration_B/HDL/RTL/SBOX/GF16_INV.vhdl

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Configuration_B/HDL/RTL/SBOX/GF16_MUL.vhdl

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Configuration_B/HDL/RTL/SBOX/GF16_SQ_SCnu.vhdl

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Configuration_B/HDL/RTL/SBOX/GF256_INV.vhdl

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Configuration_B/HDL/RTL/SBOX/GF4_MUL.vhdl

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Configuration_B/HDL/RTL/SBOX/GF4_MUL_SCLw2.vhdl

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Configuration_B/HDL/RTL/SBOX/GF4_SQ.vhdl

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Configuration_B/HDL/RTL/SBOX/GF4_ScW

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Configuration_B/HDL/RTL/SBOX/GF4_ScW.vhdl

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Configuration_B/HDL/RTL/SBOX/GF4_ScW2.vhdl

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Configuration_B/HDL/RTL/SBOX/SBOX.cr.mti

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Configuration_B/HDL/RTL/SBOX/SBOX.mpf

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Configuration_B/HDL/RTL/SBOX/SBOX.vhdl

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Configuration_B/HDL/RTL/SBOX/SBOX.vhdl~

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Configuration_B/HDL/RTL/SBOX/SBOXTB.vhdl

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Configuration_B/HDL/RTL/SBOX/SBOXTB.vhdl~

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Configuration_B/HDL/RTL/SBOX/a.c

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Configuration_B/HDL/RTL/SBOX/a.c~

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Configuration_B/HDL/RTL/SBOX/a.out

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Configuration_B/HDL/RTL/SBOX/b.c

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Configuration_B/HDL/RTL/SBOX/b.c~

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Configuration_B/HDL/RTL/SBOX/ed.vec

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Configuration_B/HDL/RTL/SBOX/inprand.vec

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Configuration_B/HDL/RTL/SBOX/l.vec

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Configuration_B/HDL/RTL/SBOX/vsim.wlf

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Configuration_B/HDL/RTL/SBOX/work/gf16_inv/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.prw

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Configuration_B/HDL/RTL/SBOX/work/gf16_inv/gf16inv.psm

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Configuration_B/HDL/RTL/SBOX/work/gf16_mul/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf16_mul/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.dat

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Configuration_B/HDL/RTL/SBOX/work/gf16_mul/gf16mul.prw

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Configuration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dat

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Configuration_B/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.psm

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Configuration_B/HDL/RTL/SBOX/work/gf256_inv/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf256_inv/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dat

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Configuration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.prw

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Configuration_B/HDL/RTL/SBOX/work/gf256_inv/gf256inv.psm

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Configuration_B/HDL/RTL/SBOX/work/gf4_mul/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.prw

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Configuration_B/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.psm

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw/g4scw.prw

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw/g4scw.psm

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.prw

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Configuration_B/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.psm

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Configuration_B/HDL/RTL/SBOX/work/gf4_sq/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_sq/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.dat

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Configuration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.prw

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Configuration_B/HDL/RTL/SBOX/work/gf4_sq/g4sq.psm

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Configuration_B/HDL/RTL/SBOX/work/sbox/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/sbox/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/sbox/aessbox.dat

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Configuration_B/HDL/RTL/SBOX/work/sbox/aessbox.dbs

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Configuration_B/HDL/RTL/SBOX/work/sbox/aessbox.prw

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/_primary.dat

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/_primary.dbs

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.dat

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.dbs

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.prw

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Configuration_B/HDL/RTL/SBOX/work/sboxtb/test_sbox.psm

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Configuration_B/HDL/RTL/SBOXED.vhdl

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Configuration_B/HDL/RTL/SBOXL.vhdl

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Configuration_B/HDL/RTL/STAGE.vhdl

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Configuration_B/HDL/RTL/STAGE.vhdl~

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Configuration_B/HDL/RTL/STAGEe.vhdl

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Configuration_B/HDL/RTL/STAGEk.vhdl

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Configuration_B/HDL/RTL/STAGEk.vhdl~

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Configuration_B/HDL/RTL/STAGEn.vhdl

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Configuration_B/HDL/RTL/ShiftReg128.vhdl

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Configuration_B/HDL/RTL/aes.vhdl

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Configuration_B/HDL/RTL/aes.vhdl~

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Configuration_B/HDL/RTL/aes1.vhd

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Configuration_B/HDL/RTL/aes1.vhd~

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Configuration_B/HDL/RTL/aes20.vhdl

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Configuration_B/HDL/RTL/aes20.vhdl~

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Configuration_B/HDL/RTL/aes_small.vhdl

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Configuration_B/HDL/RTL/aes_small.vhdl~

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Configuration_B/HDL/RTL/aescg.vhd

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Configuration_B/HDL/RTL/aesv2.vhdl

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Configuration_B/HDL/RTL/aesv2_tb.vhdl

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Configuration_B/HDL/RTL/aesv3.vhdl

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Configuration_B/HDL/RTL/aesv3b.vhdl

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Configuration_B/HDL/RTL/aesv3f.vhdl

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Configuration_B/HDL/RTL/cgate.vhd

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Configuration_B/HDL/RTL/cgate1.vhd

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Configuration_B/HDL/RTL/comp.vhd

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Configuration_B/HDL/RTL/eff.vhd

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Configuration_B/HDL/RTL/eff1.vhd

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Configuration_B/HDL/RTL/ereg.vhd

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Configuration_B/HDL/RTL/forkaesv0.vhdl

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Configuration_B/HDL/RTL/forkaesv00.vhdl

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Configuration_B/HDL/RTL/forkaesv01.vhdl

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Configuration_B/HDL/RTL/forkaesv02.vhdl

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Configuration_B/HDL/RTL/forkaesv10.vhdl

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Configuration_B/HDL/RTL/mixcolumn.vhd

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Configuration_B/HDL/RTL/mulenc.vhd

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Configuration_B/HDL/RTL/to.c

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Configuration_B/HDL/RTL/xtime.vhd

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Configuration_B/HDL/RTL/xxtime.vhd

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Configuration_B/HDL/TBENCH/AES128TB.vhdl.bak

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Configuration_B/HDL/TBENCH/PresentSerialTB.vhdl

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Configuration_B/HDL/TBENCH/PresentSerialTB.vhdl.bak

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Configuration_B/HDL/TBENCH/PresentTB.vhdl

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Configuration_B/HDL/TBENCH/SBOXTB.vhdl

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Configuration_B/HDL/TBENCH/SBOXTB.vhdl.bak

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Configuration_B/HDL/TBENCH/aes_tb.vhdl

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Configuration_B/HDL/TBENCH/aes_tb.vhdl.bak

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Configuration_B/HDL/TBENCH/aes_tb.vhdl~

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Configuration_B/HDL/TBENCH/aesv2_tb.vhdl

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Configuration_B/HDL/TBENCH/forkv0_tb.vhdl

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Configuration_B/HDL/TBENCH/forkv0_tb.vhdl.bak

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Configuration_B/HDL/TBENCH/forkv1_tb.vhdl

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Configuration_B/Key.txt

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Configuration_B/Key8.txt

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Configuration_B/Mode.txt

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Configuration_B/PT.txt

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Configuration_B/PT8.txt

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Configuration_B/gen.c

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Configuration_B/post.sh

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Configuration_B/power_lp.tcl

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Configuration_B/saif.cmd

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Configuration_B/script.tcl

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synopsis_scripts/.synopsys_dc.setup

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synopsis_scripts/README

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synopsis_scripts/post.sh

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synopsis_scripts/power.tcl

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synopsis_scripts/saif.cmd

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synopsis_scripts/script_lp.tcl

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