This commit contains major changes in Configuration_A implementation:
e66f5cdbdf0f
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Authored by ballifa on Dec 24 2020, 01:00.

Description

This commit contains major changes in Configuration_A implementation:

clock-gating (by using enabled flip-flops) is removed so that the design can be easily compiled for 5 different libraries with compile_ultra.
testbench is updated so that the encryption/decryption/reconstruction results are dumped into file, which simplies correctness check
C code for generating test vector is added
Makefile is added which supports GHDL (only for functional verification without any tech library)

Details

Committed

ballifa

Dec 24 2020, 01:00

Pushed

ballifa

Dec 24 2020, 01:04

Parents

R9435:3fca2cd977ef: archgit created for archive purposes

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ballifa committed R9435:e66f5cdbdf0f: This commit contains major changes in Configuration_A implementation: (authored by ballifa).Dec 24 2020, 01:00

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		Path
D		Configuration_A/ED.txt
D		Configuration_A/HDL
D		Configuration_A/HDL/RTL
D		Configuration_A/HDL/RTL/AES128.vhdl~
D		Configuration_A/HDL/RTL/BIGCOL.vhdl
D		Configuration_A/HDL/RTL/COL.vhdl
V		Configuration_A/{HDL/RTL → src}/Dff_Mux.vhdl
D		Configuration_A/HDL/RTL/Dff_Mux.vhdl~
D		Configuration_A/HDL/RTL/Dff_MuxE.vhdl
D		Configuration_A/HDL/RTL/Dff_MuxE.vhdl~
V		Configuration_A/{HDL/RTL → src}/Dff_R.vhdl
D		Configuration_A/HDL/RTL/Dff_S.vhdl
D		Configuration_A/HDL/RTL/Dff_en.vhdl
V		Configuration_A/{HDL/RTL → src}/GF16_INV.vhdl
V		Configuration_A/{HDL/RTL → src}/GF16_MUL.vhdl
V		Configuration_A/{HDL/RTL → src}/GF16_SQ_SCnu.vhdl
V		Configuration_A/{HDL/RTL → src}/GF256_INV.vhdl
V		Configuration_A/{HDL/RTL → src}/GF4_MUL.vhdl
V		Configuration_A/{HDL/RTL → src}/GF4_MUL_SCLw2.vhdl
V		Configuration_A/{HDL/RTL → src}/GF4_SQ.vhdl
D		Configuration_A/HDL/RTL/GF4_ScW
V		Configuration_A/{HDL/RTL → src}/GF4_ScW.vhdl
V		Configuration_A/{HDL/RTL → src}/GF4_ScW2.vhdl
D		Configuration_A/HDL/RTL/LFSR21
D		Configuration_A/HDL/RTL/LFSR21.vhdl
D		Configuration_A/HDL/RTL/LFSR21/Dff_R.vhdl
D		Configuration_A/HDL/RTL/LFSR21/Dff_S.vhdl
D		Configuration_A/HDL/RTL/LFSR21/LFSR21.vhdl
D		Configuration_A/HDL/RTL/LFSR21/a.c
D		Configuration_A/HDL/RTL/LFSR21/a.c~
D		Configuration_A/HDL/RTL/LFSR21/a.out
D		Configuration_A/HDL/RTL/M10C.vhdl
D		Configuration_A/HDL/RTL/MC2.vhd
D		Configuration_A/HDL/RTL/MC3.vhd
D		Configuration_A/HDL/RTL/MC3.vhd~
D		Configuration_A/HDL/RTL/MC4.vhd
V		Configuration_A/{HDL/RTL → src}/MC5.vhd
V		Configuration_A/{HDL/RTL → src}/Mux21.vhdl
V		Configuration_A/{HDL/RTL → src}/Mux32_21.vhdl
V		Configuration_A/{HDL/RTL → src}/Mux8_21.vhdl
D		Configuration_A/HDL/RTL/Opreg128.vhdl
D		Configuration_A/HDL/RTL/Rcon.vhdl
D		Configuration_A/HDL/RTL/SBOX
V		Configuration_A/{HDL/RTL → src}/SBOX.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF16_INV.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF16_MUL.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF16_SQ_SCnu.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF256_INV.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF4_MUL.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF4_MUL_SCLw2.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF4_SQ.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF4_ScW
D		Configuration_A/HDL/RTL/SBOX/GF4_ScW.vhdl
D		Configuration_A/HDL/RTL/SBOX/GF4_ScW2.vhdl
D		Configuration_A/HDL/RTL/SBOX/SBOX.cr.mti
D		Configuration_A/HDL/RTL/SBOX/SBOX.mpf
D		Configuration_A/HDL/RTL/SBOX/SBOX.vhdl
D		Configuration_A/HDL/RTL/SBOX/SBOX.vhdl~
D		Configuration_A/HDL/RTL/SBOX/SBOXTB.vhdl
D		Configuration_A/HDL/RTL/SBOX/SBOXTB.vhdl~
D		Configuration_A/HDL/RTL/SBOX/a.c
D		Configuration_A/HDL/RTL/SBOX/a.c~
D		Configuration_A/HDL/RTL/SBOX/a.out
D		Configuration_A/HDL/RTL/SBOX/b.c
D		Configuration_A/HDL/RTL/SBOX/b.c~
D		Configuration_A/HDL/RTL/SBOX/ed.vec
D		Configuration_A/HDL/RTL/SBOX/inprand.vec
D		Configuration_A/HDL/RTL/SBOX/l.vec
D		Configuration_A/HDL/RTL/SBOX/vsim.wlf
D		Configuration_A/HDL/RTL/SBOX/work
D		Configuration_A/HDL/RTL/SBOX/work/_info
D		Configuration_A/HDL/RTL/SBOX/work/_vmake
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf16_inv/gf16inv.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/gf16mul.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/gf16mul.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/gf16mul.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf16_mul/gf16mul.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf16_sq_scnu/gf16sqsc.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf256_inv/gf256inv.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul/gf4mul.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_mul_sclw2/gf4mulsclw2.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw/g4scw.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_scw2/g4scw2.psm
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.dat
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.dbs
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.prw
D		Configuration_A/HDL/RTL/SBOX/work/gf4_sq/g4sq.psm
D		Configuration_A/HDL/RTL/SBOX/work/sbox
D		Configuration_A/HDL/RTL/SBOX/work/sbox/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/sbox/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/sbox/aessbox.dat
D		Configuration_A/HDL/RTL/SBOX/work/sbox/aessbox.dbs
D		Configuration_A/HDL/RTL/SBOX/work/sbox/aessbox.prw
D		Configuration_A/HDL/RTL/SBOX/work/sbox/aessbox.psm
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/_primary.dat
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/_primary.dbs
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.dat
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.dbs
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.prw
D		Configuration_A/HDL/RTL/SBOX/work/sboxtb/test_sbox.psm
D		Configuration_A/HDL/RTL/SBOXED.vhdl
D		Configuration_A/HDL/RTL/SBOXL.vhdl
D		Configuration_A/HDL/RTL/STAGE.vhdl
D		Configuration_A/HDL/RTL/STAGE.vhdl~
D		Configuration_A/HDL/RTL/STAGEe.vhdl
D		Configuration_A/HDL/RTL/STAGEk.vhdl
D		Configuration_A/HDL/RTL/STAGEk.vhdl~
D		Configuration_A/HDL/RTL/STAGEn.vhdl
D		Configuration_A/HDL/RTL/ShiftReg128.vhdl
D		Configuration_A/HDL/RTL/T160
D		Configuration_A/HDL/RTL/T160/.synopsys_dc.setup
D		Configuration_A/HDL/RTL/T160/.vcs_lib_lock
D		Configuration_A/HDL/RTL/T160/.vlogansetup.args
D		Configuration_A/HDL/RTL/T160/.vlogansetup.env
D		Configuration_A/HDL/RTL/T160/64
D		Configuration_A/HDL/RTL/T160/64/TRIVIUM_TB.mra
D		Configuration_A/HDL/RTL/T160/64/TRIVIUM_TB.sim
D		Configuration_A/HDL/RTL/T160/64/TRIVIUM_TB__TB.sim
D		Configuration_A/HDL/RTL/T160/AN.DB
D		Configuration_A/HDL/RTL/T160/AN.DB/AllModulesSkeletons.db
D		Configuration_A/HDL/RTL/T160/AN.DB/compat.db
D		Configuration_A/HDL/RTL/T160/AN.DB/compunitcnt.db
D		Configuration_A/HDL/RTL/T160/AN.DB/crc.db
D		Configuration_A/HDL/RTL/T160/AN.DB/designHierarchy
D		Configuration_A/HDL/RTL/T160/AN.DB/didmap.db
D		Configuration_A/HDL/RTL/T160/AN.DB/dumpcheck.db
D		Configuration_A/HDL/RTL/T160/AN.DB/dve_debug.db
D		Configuration_A/HDL/RTL/T160/AN.DB/make.vlogan
D		Configuration_A/HDL/RTL/T160/AN.DB/modfilename.db
D		Configuration_A/HDL/RTL/T160/AN.DB/offfilename.db
D		Configuration_A/HDL/RTL/T160/AN.DB/str.db
D		Configuration_A/HDL/RTL/T160/AN.DB/timescale.db
D		Configuration_A/HDL/RTL/T160/AN.DB/version.db
D		Configuration_A/HDL/RTL/T160/AN.DB/vir_fileindex.db
D		Configuration_A/HDL/RTL/T160/AN.DB/vir_filename.db
D		Configuration_A/HDL/RTL/T160/AN.DB/vir_filenode.db
D		Configuration_A/HDL/RTL/T160/AN.DB/vir_filespace.db
D		Configuration_A/HDL/RTL/T160/AN.DB/vloganopts.db
D		Configuration_A/HDL/RTL/T160/DVEfiles
D		Configuration_A/HDL/RTL/T160/DVEfiles/dve_gui.log
D		Configuration_A/HDL/RTL/T160/DVEfiles/dve_history.log
D		Configuration_A/HDL/RTL/T160/DVEfiles/session.tcl
D		Configuration_A/HDL/RTL/T160/HDL
D		Configuration_A/HDL/RTL/T160/HDL/RTL
D		Configuration_A/HDL/RTL/T160/HDL/RTL/sreg.vhd
D		Configuration_A/HDL/RTL/T160/HDL/RTL/sreg.vhd~
D		Configuration_A/HDL/RTL/T160/HDL/RTL/trivium.vhd
D		Configuration_A/HDL/RTL/T160/HDL/RTL/trivium.vhd~
D		Configuration_A/HDL/RTL/T160/HDL/RTL/ufunc.vhd
D		Configuration_A/HDL/RTL/T160/HDL/RTL/ufunc.vhd~
D		Configuration_A/HDL/RTL/T160/HDL/TBENCH
D		Configuration_A/HDL/RTL/T160/HDL/TBENCH/grain_tb.vhd~
D		Configuration_A/HDL/RTL/T160/HDL/TBENCH/trivium_tb.vhd
D		Configuration_A/HDL/RTL/T160/HDL/TBENCH/trivium_tb.vhd~
D		Configuration_A/HDL/RTL/T160/IV.txt
D		Configuration_A/HDL/RTL/T160/Key.txt
D		Configuration_A/HDL/RTL/T160/PT.txt
D		Configuration_A/HDL/RTL/T160/PT.txt~
D		Configuration_A/HDL/RTL/T160/T160.mpf
D		Configuration_A/HDL/RTL/T160/WORK
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/_info
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/_vmake
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/_primary.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/_primary.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/sr.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/sr.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/sr.prw
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/sreg/sr.psm
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/_primary.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/_primary.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/tr1.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/tr1.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/tr1.prw
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium/tr1.psm
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/_primary.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/_primary.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/tb.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/tb.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/tb.prw
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/trivium_tb/tb.psm
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/_primary.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/_primary.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/uf.dat
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/uf.dbs
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/uf.prw
D		Configuration_A/HDL/RTL/T160/WORK (Case Conflict)/ufunc/uf.psm
D		Configuration_A/HDL/RTL/T160/WORK/ARCH
D		Configuration_A/HDL/RTL/T160/WORK/ARCH/SR-SREG.vif
D		Configuration_A/HDL/RTL/T160/WORK/ARCH/TR1-TRIVIUM.vif
D		Configuration_A/HDL/RTL/T160/WORK/ARCH/UF-UFUNC.vif
D		Configuration_A/HDL/RTL/T160/WORK/ENTI
D		Configuration_A/HDL/RTL/T160/WORK/ENTI/SREG.vif
D		Configuration_A/HDL/RTL/T160/WORK/ENTI/TRIVIUM.vif
D		Configuration_A/HDL/RTL/T160/WORK/ENTI/UFUNC.vif
D		Configuration_A/HDL/RTL/T160/WORK/SREG-SR.syn
D		Configuration_A/HDL/RTL/T160/WORK/SREG.mr
D		Configuration_A/HDL/RTL/T160/WORK/SREG.syn
D		Configuration_A/HDL/RTL/T160/WORK/TRIVIUM-TR1.syn
D		Configuration_A/HDL/RTL/T160/WORK/TRIVIUM.mr
D		Configuration_A/HDL/RTL/T160/WORK/TRIVIUM.syn
D		Configuration_A/HDL/RTL/T160/WORK/UFUNC-UF.syn
D		Configuration_A/HDL/RTL/T160/WORK/UFUNC.mr
D		Configuration_A/HDL/RTL/T160/WORK/UFUNC.syn
D		Configuration_A/HDL/RTL/T160/a.out
D		Configuration_A/HDL/RTL/T160/area_lp.txt
D		Configuration_A/HDL/RTL/T160/command.log
D		Configuration_A/HDL/RTL/T160/csrc
D		Configuration_A/HDL/RTL/T160/csrc/5NrIB_d.o
D		Configuration_A/HDL/RTL/T160/csrc/5NrI_d.o
D		Configuration_A/HDL/RTL/T160/csrc/Makefile
D		Configuration_A/HDL/RTL/T160/csrc/SIM_l.o
D		Configuration_A/HDL/RTL/T160/csrc/_vcsobj_1_1.a
D		Configuration_A/HDL/RTL/T160/csrc/_vcsobj_1_1.a.info
D		Configuration_A/HDL/RTL/T160/csrc/_vcsobj_archive_info_0.lst
D		Configuration_A/HDL/RTL/T160/csrc/filelist
D		Configuration_A/HDL/RTL/T160/csrc/filelist.dpi
D		Configuration_A/HDL/RTL/T160/csrc/filelist.hsopt
D		Configuration_A/HDL/RTL/T160/csrc/hsim
D		Configuration_A/HDL/RTL/T160/csrc/hsim/hsim_fileindex.db
D		Configuration_A/HDL/RTL/T160/csrc/hsim/hsim_filename.db
D		Configuration_A/HDL/RTL/T160/csrc/hsim/hsim_filenode.db
D		Configuration_A/HDL/RTL/T160/csrc/hsim/hsim_filespace.db
D		Configuration_A/HDL/RTL/T160/csrc/idincr.db
D		Configuration_A/HDL/RTL/T160/csrc/incr_fileindex.db
D		Configuration_A/HDL/RTL/T160/csrc/incr_filename.db
D		Configuration_A/HDL/RTL/T160/csrc/incr_filenode.db
D		Configuration_A/HDL/RTL/T160/csrc/incr_filespace.db
D		Configuration_A/HDL/RTL/T160/csrc/product_timestamp
D		Configuration_A/HDL/RTL/T160/csrc/rmapats.c
D		Configuration_A/HDL/RTL/T160/csrc/rmapats.h
D		Configuration_A/HDL/RTL/T160/csrc/rmapats.m
D		Configuration_A/HDL/RTL/T160/csrc/rmapats.o
D		Configuration_A/HDL/RTL/T160/csrc/rmapats_mop.o
D		Configuration_A/HDL/RTL/T160/csrc/vcsconst.incr
D		Configuration_A/HDL/RTL/T160/csrc/vcspieces.incr
D		Configuration_A/HDL/RTL/T160/csrc/vcstype.incr
D		Configuration_A/HDL/RTL/T160/csrc/vh
D		Configuration_A/HDL/RTL/T160/csrc/vh/DEFAULT__DUMMY_MHDL_CFG_TRIVIUM_TB.o___0_0_0_2_1_1_0_1_0_264715851_1048576_0_6
D		Configuration_A/HDL/RTL/T160/csrc/vh/DEFAULT__TRIVIUM.o___0_0_0_2_1_1_0_1_0_3703999202_1048576_0_6_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/DEFAULT__TRIVIUM_TB.o___0_0_0_2_1_1_0_1_0_1779973436_1048576_0_6_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/DEFAULT__TRIVIUM_TB__TB.o___0_0_0_2_1_1_0_1_0_1565544099_1048576_0_6_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/DEFAULT__TRIVIUM__MODULE.o___0_0_0_2_1_1_0_1_0_741834688_1048576_0_6_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/IEEE__STD_LOGIC_TEXTIO__.o___0_0_0_2_1_1_0_1_0_4279669086_1048576_0_2_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/IEEE__STD_LOGIC_UNSIGNED__.o___0_0_0_2_1_1_0_1_0_1868306667_1048576_0_2_2063999_384
D		Configuration_A/HDL/RTL/T160/csrc/vh/ScMain.c
D		Configuration_A/HDL/RTL/T160/csrc/vh/ScMain.o
D		Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339
D		Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339_0.o
D		Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339_1.o
D		Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22339_2.o
D		Configuration_A/HDL/RTL/T160/csrc/vh/eda4.imm.dtu.dk_22340
D		Configuration_A/HDL/RTL/T160/csrc/vh/sc_filelist
D		Configuration_A/HDL/RTL/T160/csrc/vh/scsFilelist.c
D		Configuration_A/HDL/RTL/T160/csrc/vh/scsFilelist.o
D		Configuration_A/HDL/RTL/T160/csrc/vh/scscomm.c
D		Configuration_A/HDL/RTL/T160/csrc/vh/scscomm.o
D		Configuration_A/HDL/RTL/T160/default.svf
D		Configuration_A/HDL/RTL/T160/gen.c
D		Configuration_A/HDL/RTL/T160/gen.c~
D		Configuration_A/HDL/RTL/T160/inter.vpd
D		Configuration_A/HDL/RTL/T160/post.sh
D		Configuration_A/HDL/RTL/T160/power_lp.tcl
D		Configuration_A/HDL/RTL/T160/powercon_lp.txt
D		Configuration_A/HDL/RTL/T160/powerhier_lp.txt
D		Configuration_A/HDL/RTL/T160/pre.sh
V		Configuration_A/{HDL/RTL/T160 → scripts}/saif.cmd
D		Configuration_A/HDL/RTL/T160/scirocco_command.log
D		Configuration_A/HDL/RTL/T160/script_lp.tcl
D		Configuration_A/HDL/RTL/T160/sdfAnnotateInfo
D		Configuration_A/HDL/RTL/T160/simv
D		Configuration_A/HDL/RTL/T160/simv.daidir
D		Configuration_A/HDL/RTL/T160/simv.daidir/.version
D		Configuration_A/HDL/RTL/T160/simv.daidir/AllModulesSkeletons.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/adhsoptmap.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/build_db
D		Configuration_A/HDL/RTL/T160/simv.daidir/compat.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/covg_defs
D		Configuration_A/HDL/RTL/T160/simv.daidir/crc.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.MAX
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.MIN
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.TYP
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.MAX
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.MIN
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf.hs.TYP
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf10.AUX
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf10.hs.AUX
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf1_0.MAIN
D		Configuration_A/HDL/RTL/T160/simv.daidir/csdf1_0.hs.MAIN
D		Configuration_A/HDL/RTL/T160/simv.daidir/didmap.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/dumpcheck.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/dve_debug.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_fileindex.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filename.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filenode.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/elabmoddb_filespace.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/external_functions
D		Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf1.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf2.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf3.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/hscsdf4.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/hsim_gbl_node.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/hsim_root_sig.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/hsim_vpdopt_op_ip_map.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/ilcgSigAttrUsed
D		Configuration_A/HDL/RTL/T160/simv.daidir/modfilename.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/mxmap.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/mxopt.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/mxsetup.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/offfilename.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/rmapats.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/.mhdlinst.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/DUMMY_MHDL_CFG_TRIVIUM_TB.sim
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/dummyVhConfig.vhd
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/ilcgDuIds
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/mdb.dui
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/sc_efile
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/sc_loadlist
D		Configuration_A/HDL/RTL/T160/simv.daidir/scsim.db.dir/scsim.db.file
D		Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl
D		Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/sdf_vhdl_el.in
D		Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/sdf_vhdl_rt.in
D		Configuration_A/HDL/RTL/T160/simv.daidir/sdf_mhdl/trivium-syn.sdf
D		Configuration_A/HDL/RTL/T160/simv.daidir/sdfcall_list
D		Configuration_A/HDL/RTL/T160/simv.daidir/str.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/topmodules
D		Configuration_A/HDL/RTL/T160/simv.daidir/tt_fileindex.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/tt_filename.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/tt_filenode.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/tt_filespace.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/unielab.mx
D		Configuration_A/HDL/RTL/T160/simv.daidir/unielab.vhtop
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcs_rebuild
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_elabmod_insts.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_elabout.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_fs.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_mimo_tables.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_tables.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_master_hsim_vecconst.dat
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsdef.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsdefbe.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_elab.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_fegate.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_gate.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_lvl.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_hsim_merge.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_mnmn.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_partition.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcselab_misc_vcselabref.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vcsmx_rebuild
D		Configuration_A/HDL/RTL/T160/simv.daidir/version.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vir_fileindex.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vir_filename.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vir_filenode.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vir_filespace.db
D		Configuration_A/HDL/RTL/T160/simv.daidir/vloganopts.db
D		Configuration_A/HDL/RTL/T160/timing_lp.txt
D		Configuration_A/HDL/RTL/T160/trivium-full_timing.saif
D		Configuration_A/HDL/RTL/T160/trivium-syn.sdf
D		Configuration_A/HDL/RTL/T160/trivium-syn.v
D		Configuration_A/HDL/RTL/T160/trivium.ddc
D		Configuration_A/HDL/RTL/T160/trivium.sdc
D		Configuration_A/HDL/RTL/T160/trivium.vhdl
D		Configuration_A/HDL/RTL/T160/ucli.key
D		Configuration_A/HDL/RTL/T160/vsim.wlf
D		Configuration_A/HDL/RTL/aes.vhdl
D		Configuration_A/HDL/RTL/aes.vhdl~
D		Configuration_A/HDL/RTL/aes1.vhd
D		Configuration_A/HDL/RTL/aes1.vhd~
D		Configuration_A/HDL/RTL/aes20.vhdl
D		Configuration_A/HDL/RTL/aes20.vhdl~
D		Configuration_A/HDL/RTL/aes_small.vhdl
D		Configuration_A/HDL/RTL/aes_small.vhdl~
D		Configuration_A/HDL/RTL/aescg.vhd
D		Configuration_A/HDL/RTL/aesv2.vhdl
D		Configuration_A/HDL/RTL/aesv2_tb.vhdl
D		Configuration_A/HDL/RTL/aesv3.vhdl
D		Configuration_A/HDL/RTL/aesv3b.vhdl
D		Configuration_A/HDL/RTL/aesv3f.vhdl
V		Configuration_A/{HDL/RTL → src}/cgate.vhd
D		Configuration_A/HDL/RTL/comp.vhd
D		Configuration_A/HDL/RTL/eff.vhd
D		Configuration_A/HDL/RTL/eff1.vhd
D		Configuration_A/HDL/RTL/forkaesv0.vhdl
D		Configuration_A/HDL/RTL/forkaesv00.vhdl
D		Configuration_A/HDL/RTL/forkaesv01.vhdl
V		Configuration_A/{HDL/RTL → src}/forkaesv02.vhdl
D		Configuration_A/HDL/RTL/mixcolumn.vhd
D		Configuration_A/HDL/RTL/mulenc.vhd
D		Configuration_A/HDL/RTL/to.c
V		Configuration_A/{HDL/RTL → src}/xtime.vhd
V		Configuration_A/{HDL/RTL → src}/xxtime.vhd
D		Configuration_A/HDL/TBENCH
D		Configuration_A/HDL/TBENCH/AES128TB.vhdl.bak
D		Configuration_A/HDL/TBENCH/PresentSerialTB.vhdl
D		Configuration_A/HDL/TBENCH/PresentSerialTB.vhdl.bak
D		Configuration_A/HDL/TBENCH/PresentTB.vhdl
D		Configuration_A/HDL/TBENCH/SBOXTB.vhdl
D		Configuration_A/HDL/TBENCH/SBOXTB.vhdl.bak
D		Configuration_A/HDL/TBENCH/aes_tb.vhdl
D		Configuration_A/HDL/TBENCH/aes_tb.vhdl.bak
D		Configuration_A/HDL/TBENCH/aes_tb.vhdl~
D		Configuration_A/HDL/TBENCH/aesv2_tb.vhdl
D		Configuration_A/HDL/TBENCH/forkv0_tb.vhdl
D		Configuration_A/HDL/TBENCH/forkv0_tb.vhdl.bak
D		Configuration_A/Key.txt
D		Configuration_A/Key8.txt
A		Configuration_A/Makefile
D		Configuration_A/Mode.txt
D		Configuration_A/PT.txt
D		Configuration_A/PT8.txt
D		Configuration_A/post.sh
D		Configuration_A/power_lp.tcl
D		Configuration_A/saif.cmd
D		Configuration_A/script.tcl
A	(dir)	Configuration_A/scripts/
A		Configuration_A/scripts/analyze.sh
A		Configuration_A/scripts/compile.tcl
A		Configuration_A/scripts/power.tcl
V		Configuration_A/{scripts ← HDL/RTL/T160}/saif.cmd
A		Configuration_A/scripts/verify.sh
A	(dir)	Configuration_A/src/
V		Configuration_A/{src ← HDL/RTL}/Dff_Mux.vhdl
V		Configuration_A/{src ← HDL/RTL}/Dff_R.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF16_INV.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF16_MUL.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF16_SQ_SCnu.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF256_INV.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF4_MUL.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF4_MUL_SCLw2.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF4_SQ.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF4_ScW.vhdl
V		Configuration_A/{src ← HDL/RTL}/GF4_ScW2.vhdl
V		Configuration_A/{src ← HDL/RTL}/MC5.vhd
V		Configuration_A/{src ← HDL/RTL}/Mux21.vhdl
V		Configuration_A/{src ← HDL/RTL}/Mux32_21.vhdl
V		Configuration_A/{src ← HDL/RTL}/Mux8_21.vhdl
V		Configuration_A/{src ← HDL/RTL}/SBOX.vhdl
A		Configuration_A/src/STAGE.vhdl
A		Configuration_A/src/STAGEn.vhdl
V		Configuration_A/{src ← HDL/RTL}/cgate.vhd
A		Configuration_A/src/eff1.vhd
V		Configuration_A/{src ← HDL/RTL}/forkaesv02.vhdl
A		Configuration_A/src/forkv0_tb.vhdl
V		Configuration_A/{src ← HDL/RTL}/xtime.vhd
V		Configuration_A/{src ← HDL/RTL}/xxtime.vhd
A	(dir)	Configuration_A/test_vectors/
A		Configuration_A/test_vectors/case_generator.c